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Western Digital has announced its intention to include 3D Resistive RAM (ReRAM) as storage class memory (SCM) in future SSDs and other products:
Without making any significant announcements this week, Western Digital indicated that it would use some of the things it has learnt while developing its BiCS 3D NAND to produce its ReRAM chips. The company claims that its ReRAM will feature a multi-layer cross-point implementation, something it originally revealed a while ago.
Perhaps, the most important announcement regarding the 3D ReRAM by Western Digital is the claim about scale and capital efficiency of the new memory. Essentially, this could mean that the company plans to use its manufacturing capacities as well as its infrastructure (testing, packaging, etc.) in Yokkaichi, Japan, to make 3D ReRAM. Remember that SCM is at this point more expensive than NAND, hence, it makes sense to continue using the current fabs and equipment to build both types of non-volatile memory so ensure that the SCM part of the business remains profitable.
One of WD's slides projects SCM as 50% the cost per gigabyte of DRAM in 2017, declining to 5% by 2023.
Samsung introduced its fourth generation of vertical NAND, with 64 layers:
With a per-die capacity of 512Gb (64GB), Samsung can now put 1TB of TLC flash in a single package. This means most product lines will be seeing an increase in capacity at the high end of the range. Their BGA SSD products will be offering 1TB capacity even in the 11.5mm by 13mm form factor. The 16TB PM1633a SAS SSD will be eclipsed by the new 32TB PM1643. Likely to be further out, the PM1725 PCIe add-in card SSD will be succeeded by the PM1735 with a PCIe 4 x8 host interface.
Complementing the NAND update will be a new non-standard oversized M.2 form factor 32mm wide and 114mm long, compared to the typical enterprise M.2 size of 22mm by 110mm. A little extra room can go a long way, and Samsung will be using it to produce 8TB drives. These will be enterprise SSDs and Samsung showed a diagram of these enabling 256TB of flash in a 1U server. Samsung will also be producing 4TB drives in standard M.2 sizing.
In what is likely a bid to steal some thunder from 3D XPoint memory before it can ship, Samsung announced Z-NAND memory technology and a Z-SSD product based around Z-NAND and a new SSD controller. They said nothing about the operating principles of Z-NAND, but they did talk about their plans for the Z-SSD products.
(Score: 2) by takyon on Sunday August 14 2016, @12:11AM
3D/vertical scaling has done wonders for NAND though, delaying endurance issues for at least a decade.
The ITRS 2015 report [semiconductors.org] has some interesting predictions that may be conservative (page 33 of the report, 43 of the PDF). 512 layers by 2030. That's a number no manufacturer has been willing to throw out, but we know they might be able to get to numbers like 128 and 192 by string stacking 64 layer dies. The table lists production of 768 Gbit @64-96 layers in 2020, but as we can see in the summary Samsung is doing 512 Gb @ 64 layers already. From Samsung's press release [legitreviews.com], we find out that "Samsung plans to provide the world’s first 4th generation V-NAND flash memory products in the fourth quarter of this year". Samsung's first generation of V-NAND was "introduced" in August 2013. So we are seeing new generations at a rate of more than one a year.
The same WD slide mentioned in the summary has the $/GB gap between SCM and 3D BiCS NAND staying constant, while the gap between SCM and DRAM widens. That and other commentary leads me to believe that SCM/XPoint/Crossbar/etc. tier will make gains at the expense of DRAM, not NAND.
The ITRS page has DRAM density quadrupling between 2015 and 2030, while NAND density increases 16x.
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(Score: 2) by takyon on Sunday August 14 2016, @12:14AM
For some reason the space between "@" and "64" in "768 Gbit @ 64-96 layers" disappears in the comment preview and posting. It requires both of the links apparently.
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(Score: 2) by takyon on Sunday August 14 2016, @12:31AM
Actually, it requires just the second link:
A @B space should be before the B AAAAAAAAHHHHH [google.com]
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(Score: 2) by jmorris on Sunday August 14 2016, @02:04AM
They are still losing ground. Old school SLC flash had 100,000+ write endurance. MLC Flash fell to 10,000 and this new TLC is rated for only 1,000 writes. Even if they can hold that 1,000 figure as they scale up the number of bits per cell they are already in territory where I for one wouldn't like buying anything with the stuff soldered down to the main system board. So they are likely left just scaling layers, leaving out more dense coding and die shrinks. Not good. Once your capacity growth is strictly limited to stacking physical bits into ever more complex structures you probably leave Moore's Law behind and a competitor has an opportunity.
(Score: 2) by takyon on Sunday August 14 2016, @02:27AM
No, I don't think so [eetimes.com]:
Because of the larger process node.
I'm not sure about 3rd or 4th gen 3D NAND, but it's sure higher than 1,000 writes. It might even still be at 20k.
Pretty soon, almost all NAND will be 3D NAND (you can use DRAM or SCM/XPoint/whatever as a cache instead of... 3D SLC?). Maybe in the future we will see a low endurance offshoot where the process node shrinks to ~15nm along with adding more layers. Plenty of customers could use NAND that isn't rated for multiple drive writes per day for cold storage purposes.
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(Score: 2) by Scruffy Beard 2 on Sunday August 14 2016, @06:38AM
Write endurance also tells you how long you can leave it on the shelf.
The old SLC NAND could store data for about 100 years... after the first write. It goes down from there as you wear down the gate insulation.
(Score: 2) by takyon on Sunday August 14 2016, @12:08PM
All Amazon Glacier has to do is fire it up every year or two, right?
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(Score: 2) by Scruffy Beard 2 on Sunday August 14 2016, @01:17PM
I have heard that with MLC flash, just reading it degrades the information.