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posted by Fnord666 on Tuesday May 28 2019, @11:08PM   Printer-friendly
from the chips-will-soon-design-themselves dept.

From ieee spectrum

Engineers at Georgia Tech say they've come up with a programmable prototype chip that efficiently solves a huge class of optimization problems, including those needed for neural network training, 5G network routing, and MRI image reconstruction. The chip's architecture embodies a particular algorithm that breaks up one huge problem into many small problems, works on the subproblems, and shares the results. It does this over and over until it comes up with the best answer. Compared to a GPU running the algorithm, the prototype chip—called OPTIMO—is 4.77 times as power efficient and 4.18 times as fast.

[...] The test chip was made up of a grid of 49 "optimization processing units," cores designed to perform ADMM and containing their own high-bandwidth memory. The units were connected to each other in a way that speeds ADMM. Portions of data are distributed to each unit, and they set about solving their individual subproblems. Their results are then gathered, and the data is adjusted and resent to the optimization units to perform the next iteration. The network that connects the 49 units is specifically designed to speed this gather and scatter process.


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  • (Score: 2) by takyon on Tuesday May 28 2019, @11:15PM (4 children)

    by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Tuesday May 28 2019, @11:15PM (#848694) Journal

    Compared to a GPU running the algorithm, the prototype chip—called OPTIMO—is 4.77 times as power efficient and 4.18 times as fast.

    Is a GPU better than a "TPU" or ASIC at these problems?

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    [SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
    • (Score: 2) by RS3 on Wednesday May 29 2019, @12:11AM (2 children)

      by RS3 (6367) on Wednesday May 29 2019, @12:11AM (#848705)

      That's a really good question. An ASIC will be fastest, if the task is suited to a bunch of logic. And many companies are doing a combination of ASICs (FPGA), CPU, TPU, GPU, whatever else, gives the most computing power. But you need a really good overall system architect- someone who understands both software and hardware, to plan it out. Where's Seymour Cray!

      • (Score: 0) by Anonymous Coward on Wednesday May 29 2019, @12:33AM (1 child)

        by Anonymous Coward on Wednesday May 29 2019, @12:33AM (#848711)

        If Musk is to be believed, he hired the modern equivalent of Cray to design the Tesla self-driving hardware. See recent video press conference on autonomy, where Musk claims they have several years head start on their competition.

        • (Score: 0) by Anonymous Coward on Wednesday May 29 2019, @12:35AM

          by Anonymous Coward on Wednesday May 29 2019, @12:35AM (#848712)

          Is is NOT to be believed.

    • (Score: 0) by Anonymous Coward on Wednesday May 29 2019, @04:40PM

      by Anonymous Coward on Wednesday May 29 2019, @04:40PM (#848974)

      Is a GPU better than a "TPU" or ASIC at these problems?

      Is a TPU not an ASIC and can you not implement ADMM on a TPU? Go not to AC's for council for they will say both yes [stanford.edu] and no. [arxiv.org]

  • (Score: 1) by anubi on Tuesday May 28 2019, @11:52PM (4 children)

    by anubi (2828) on Tuesday May 28 2019, @11:52PM (#848702) Journal

    Maybe they can put these in traffic lights?

    Sometimes, it looks to me like a goat would do better than what they put in.

    --
    "Prove all things; hold fast that which is good." [KJV: I Thessalonians 5:21]
    • (Score: 3, Interesting) by RS3 on Wednesday May 29 2019, @12:20AM (3 children)

      by RS3 (6367) on Wednesday May 29 2019, @12:20AM (#848708)

      Sore subject. Of course they have enough power in traffic light controllers to help traffic flow smoothly. I've heard in a few places, including here, that whoever the people are who design roads, signs, signals, etc., WANT to slow people down.

      Many lights in my area, especially after 11 PM, will turn RED and stop traffic on the main road when there is nobody on a side road. At a couple of those lights I used to hit regularly, I experimented by driving way around the sensor loops which are far from the light, and sure enough, the light stays green. But when you hit those loops, the light goes yellow. Once a cop stopped me- I had done nothing wrong, got no ticket or warning- they just like doing that, and when he was done, I asked him about that light stopping people. He looked off in the distance and muttered something about "oh, it's doing that again, I'll have to talk to them..." and sure enough, a few days later it stopped the stopping behavior. But of course, it's back to doing that. I think some HCl sprayed into the vents will fix it.

      • (Score: 3, Interesting) by Farkus888 on Wednesday May 29 2019, @01:05AM (2 children)

        by Farkus888 (5159) on Wednesday May 29 2019, @01:05AM (#848724)

        It is intentional to get people to speed less. No long running start to get going fast. Is it safer than the rear end and red light runner accidents it causes? I'd wager the study was never done. Incidentally a traffic circle slows people down from every direction at all times instead of just half the time from one direction. It does that without making traffic from any direction stop for minutes on end as well.

        • (Score: 2) by RS3 on Wednesday May 29 2019, @03:01AM (1 child)

          by RS3 (6367) on Wednesday May 29 2019, @03:01AM (#848752)

          What you're saying is right, so this rant is directed at the govt. and other's who think this is a good thing.

          I'm not a fan of traffic circles because they force you to slow down (waste energy unless you have regenerative braking) no matter what the traffic volume is.

          It is NOT fair, just, nor right for a govt. to punish a law-abiding citizen. I go the speed limit or less and the light turns red.

          How about we charge them for the brake dust pollution, brake jobs, gasoline, and a carbon tax that comes out of their personal pockets? When the few are overruling the many, something's wrong.

          If / when we all have self-driving electric vehicles, I won't mind- I can study, browse, nap, watch TV / movie. Until then, govt. should promote more efficient society, or get out of the way.

          • (Score: 3, Interesting) by Farkus888 on Wednesday May 29 2019, @06:39AM

            by Farkus888 (5159) on Wednesday May 29 2019, @06:39AM (#848804)

            Traffic circles have a narrow use case. 2 lanes crossing 2 lanes with light traffic signal volume down through 4 way stop but not including 2 way stop signs. Speed limits already set low due to other conditions, 35 mph seems like a good upper limit. 0 person time wasted sitting at lights and far less energy wasted by not crossing through the 15 to 0 mph range and then back up. In that scenario they are by far most efficient for travelers. That makes up a huge percentage of intersections outside the major cities.

  • (Score: 0) by Anonymous Coward on Wednesday May 29 2019, @03:31AM (1 child)

    by Anonymous Coward on Wednesday May 29 2019, @03:31AM (#848759)

    Application specific chips perform better at specific applications, ok we know that. Can they show benefit as programmable chips? Meaning, do these things boast performance improvements over FPGAs that were programmed for the profile task?

    If not, then no news here. If so, great!

    • (Score: 2) by RS3 on Friday May 31 2019, @01:18AM

      by RS3 (6367) on Friday May 31 2019, @01:18AM (#849558)

      I don't fully understand your question, so please understand that this comment might not dovetail with yours.

      I think there's some confusion about terminology and functionality. It's a Venn diagram thing- there is much overlap, but the differences might be a deal-breaker depending on the situation.

      An ASIC is a totally blank slate- it can be whatever you want and have the funding to design and produce. No limits on size, can be analog, digital, mixed.

      An FPGA is limited by the sizes and speeds of available chips.

      You could design your own ASIC that is an FPGA.

      The Georgia Tech chips are more like a CPU, GPU, TPU, DSP, etc. in that they're all programmable within the constrains of the architecture that is ironed in. It's a bit like programming a robot arm that has 3 joints and 2 pivots- you're constrained by the physical thing; as opposed to a giant box of parts and you can design any mechanical system you want, and then program it.

      The point is, they've come up with a philosophical approach for handling some kinds of processing, and it becomes another functional module available to system designers.

      Another analogy: there are many programming languages that can make an application program. People love to argue the merits of one or the other, but much of it depends on what works well for the person doing the programming.

      A good summary of FPGA vs. ASIC: https://numato.com/blog/differences-between-fpga-and-asics/ [numato.com]

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