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As reported by ZDNet:
A decade ago, an idea was born in a laboratory at the University of California at Berkeley to create a lingua franca for computer chips, a set of instructions that would be used by all chipmakers and owned by none.
It wasn't supposed to be an impressive new technology, it was merely supposed to get the industry on the same page, to simplify chip-making in order to move things forward.
But a funny thing has happened on the way to a global chip standard: RISC-V, as the Berkeley effort is known, has begun to produce some technical breakthroughs in chip design.
As just one example, a recent microprocessor design using RISC-V has a clock speed of 5 gigahertz, well above a recent, top-of-the-line Intel Xeon server chip, E7, running at 3.2 gigahertz. Yet the novel RISC-V chip burns just 1 watt of power at 1.1 volts, less than one percent of the power burned by the Intel Xeon.
[...] The new 5-gigahertz processor, which is merely a prototype, is not the creation of a garage startup. It was made by Micro Magic Inc., a Silicon Valley intellectual property designer for chips that has been consulting to all the big Valley firms for twenty-five years. The ability of a small but seasoned crew of chip designers to accomplish such a task suggests a design renaissance that could be on the horizon.
(Score: 2, Insightful) by Anonymous Coward on Tuesday December 01 2020, @11:27PM
Depends though. The issue with the P4s was that they had very deep pipelines. That allowed Intel to push the clock speed, but required an overall longer latency for each instruction. It also made branch mispredictions very costly. The trade-off just wasn't with it. But if you can push the clock frequency without upping the latency or burning up the chip, it's a win.