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RISC-V Projects to Collaborate

posted by cmn32480 on Monday January 30 2017, @01:16PM   
from the less-risc-y dept.

An Anonymous Coward writes:

OnChip and SiFive, two groups aiming to develop and release RISC-V platforms, have announced they will collaborate. From OnChip's crowdfunding campaign:

Ever since SiFive's HiFive1 campaign was launched just a week after we launched Open-V back in November, we've both been getting a lot of questions about how we might collaborate. It's taken a while, as these things do, but we finally have a concrete answer we think will benefit everyone, not least the RISC-V community. Here's how we're collaborating:
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Open-V Will Use the SiFive E31 CPU Coreplex
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All Open-V Peripherals Will Be Compatible with SiFive Chips
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SiFive Will Donate Wafer Space in a May 2017 Tapeout
...
OnChip Will Contribute to the Free Chips Project

Sounds like good news for those hoping for RISC-V and open hardware designs to become tangible objects.
Note that the SiFive HiFive1 campaign was successful and has already shipped to some backers while the OnChip OPEN-V campaign looks like it will not reach its goal.

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Original Submission

• Re:Low to High, or High to Low? Re:Low to High, or High to Low? (Score: 2) by TheRaven on Monday January 30 2017, @05:30PM

  by TheRaven (270) on Monday January 30 2017, @05:30PM (#460712) Journal

  Have you seen the recent ARM Scalable Vector Extensions? They're based on the ideas in the Hwacha core from Berkeley. RISC-V has evolved from the toy RISC core that the author of Hwacha added to feed it with data for his PhD thesis. If there's one thing to criticise RISC-V for, lack of modern SIMD is not it.

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• Re:Low to High, or High to Low? Re:Low to High, or High to Low? (Score: 0) by Anonymous Coward on Monday January 30 2017, @05:36PM

  by Anonymous Coward on Monday January 30 2017, @05:36PM (#460714)

  I have, but there's a big difference between publishing something and it being in a shipping CPU. Which currently-available-to-buy Risc-V chip has these SIMD extensions?

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  • Re:Low to High, or High to Low? (Score: 2) by TheRaven on Tuesday January 31 2017, @09:54PM

    by TheRaven (270) on Tuesday January 31 2017, @09:54PM (#461448) Journal

    As far as I am aware, the only (non-FPGA) RISC-V silicon is from the Berkeley test chips, which also also contain Hwacha cores, so... all of them.

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