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LowRISC Announces its 0.4 Milestone Release

posted by takyon on Saturday June 10 2017, @09:54PM   
from the FOSH-(like-FOSS,-but-for-hardware) dept.

An Anonymous Coward writes:

lowRISC is a project to create a "fully open-sourced, Linux-capable, system-on-a-chip"; it is based around RISC-V, the "Free and Open RISC Instruction Set Architecture", which is meant to provide an extensible platform that scales from low-level microcontrollers up to highly parallel, high-bandwidth general-purpose supercomputers.

Here is the release announcement:

The lowRISC 0.4 milestone release is now available. The various changes are best described in our accompanying documentation, but in summary this release:

• Moves forward our support for tagged memory by re-integrating the tag cache, reducing overhead with a hierarchical scheme. This will significantly reduce caches misses caused by tagged memory accesses where tags are distributed sparsely.

• Integrates support for specifying and configuring tag propagation and exception behaviour.

• A PULPino based "minion core" has been integrated, and is used to provide peripherals such as the SD card interface, keyboard, and VGA tex display (when using the Nexys4 DDR FPGA development board).

Please report any issues on our GitHub repository, or discuss on our mailing list. As always, thank you to everyone who has contributed in any way - whether it's advice and feedback, bug reports, code, or ideas.

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Original Submission

• Still just an FPGA Implementation.... Still just an FPGA Implementation.... (Score: 0) by Anonymous Coward on Saturday June 10 2017, @10:48PM (2 children)

  by Anonymous Coward on Saturday June 10 2017, @10:48PM (#523617)

  And not even an openly documented/open development tools FPGA at that.

  When are we going to see a board based on iCE40 FPGAs offering a chip like this?

  The PicoRV32 will almost fit into the 4k model chips, and will definitely fit into the 8k chips, allowing either qfp or bga packages to be used. With maybe four of those on a board, you should be able to build an under 100-200 dollar FPGA dev board using all open tools that is capable of running a RISC-V, linux, and ideally some real peripherals instead of an embedded fail-board, that limits you far more than a Raspberry Pi ever did.

• Re:Still just an FPGA Implementation.... Re:Still just an FPGA Implementation.... (Score: 0) by Anonymous Coward on Sunday June 11 2017, @01:52PM (1 child)

  by Anonymous Coward on Sunday June 11 2017, @01:52PM (#523806)

  This. What good is an open hardware design when there are no open tools for production?

  Parent

  • Re:Still just an FPGA Implementation.... (Score: 0) by Anonymous Coward on Sunday June 11 2017, @02:09PM

    by Anonymous Coward on Sunday June 11 2017, @02:09PM (#523809)

    "What good is anything ever...."

    Pathetic nihilism.

    Parent