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posted by martyb on Tuesday August 08 2017, @03:19PM   Printer-friendly
from the core-wars dept.

Intel's Skylake-X line-up has been finalized, ranging from the i7-7800X for $389 to the i9-7980XE for $1,999. 18 cores for over $2,000 (after tax)? Someone will buy it:

Intel's high brass made a decidedly un-Intel move last August. During a routine business meeting at the company's Santa Clara headquarters, they decided to upend their desktop CPU roadmap for 2017 to prepare something new: the beastly 18-core i9-7980XE X-series. It's the company's most powerful consumer processor ever, and it marks the first time Intel hsd[sic] been able to cram that many cores into a desktop CPU. At $2,000, it's the sort of thing hardware fanatics will salivate over, and regular consumers can only dream about.

The chip's very existence came down to a surprising revelation at that meeting last year: Intel's 10-core Broadwell-E CPU, which was only on the market for a few months and cost a hefty $1,723, was selling incredibly well. And for Intel, that was a sign that there was even more opportunity in the high-end computing world.

"The 10-core part was absolutely breaking all of our sales expectations," Intel's Anand Srivatsa, general manager of its Desktop Platform Group, told Engadget in an interview. "We thought we'd wait six months or so to figure out whether this was actually going to be successful. But within the first couple months, it was absolutely clear that our community wanted as much technology as we could deliver to them."

[...] If you've been feeling nostalgic for an old-school computing hardware war, we're about to get one. AMD also announced its Threadripper CPUs for high-end desktops a few months ago, and, as usual, they're significantly cheaper than Intel's offerings. The 16-core AMD 1950X will cost $999, with speeds between 3.4GHz and 4GHz. That's the same price as Intel's 10-core i9 X-series processor, while the 16-core model will run you $1,699.

Obligatory Intel Management Engine / AMD Secure Processor comment.

Also at Intel Newsroom.


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  • (Score: 2) by arcz on Wednesday August 09 2017, @03:34AM (1 child)

    by arcz (4501) on Wednesday August 09 2017, @03:34AM (#550923) Journal

    Hardware development is something that takes enough effort that you aren't going to be able to do it in your spare time with a small uncoordinated team. It's also not something that can be done for free.

    Prototyping hardware designs requires money.
    Prototyping software designs only requires time.

    People with spare time are often willing to give some for free software, but given the extreme expenses of hardware design and manufacturing, it's unlikely altruism will be a sufficient source of money.

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  • (Score: 3, Informative) by TheRaven on Thursday August 10 2017, @08:23AM

    by TheRaven (270) on Thursday August 10 2017, @08:23AM (#551517) Journal
    Not really true. My day job involves an experimental MIPS-compatible processor and I'm also involved with various bits of RISC-V (you'll find my name in the acknowledgements section of the spec, and I'm chairing one of the extension working groups).

    Our research processor began as a R4K equivalent that was developed by a single PhD student. Not exactly a competitor for a modern system, but fast enough to boot FreeBSD and be used for experimentation. We're using some quite expensive FPGAs (though they're not 6-7 years old, so are probably much less expensive), but you can simulate in software. The simulation isn't quite useable, but is fast enough for running our test suite (it's also useful in the test suite to be able to dump the register contents with a single magic nop at certain points).

    We use a high-level HDL called BlueSpec. It's very powerful, but unfortunately it's insanely expensive for non-academic users. It's sufficiently simple to learn that I was able to add an improved branch predictor to our processor with no prior hardware experience after attending a couple of hours of lectures and have subsequently made some other quite significant changes (added a bunch of instructions, changed a data representation and so on).

    In contrast, the most popular RISC-V implementations use a high-level HDL developed at Berkeley called CHISEL. CHISEL is a Scala DSL and is pretty easy to pick up. The most complex RISC-V implementation that I'm aware of is the Berkeley Out of Order Machine (BOOM), which is an out-of-order superscalar design that has most of the features of a modern chip. Again, most of the development is done using the simulator. This is true even for a lot of commercial microprocessors: you're 99% done by the time you fab the first prototype.

    The expensive part comes when you want to either use an FPGA (comparatively cheap - a few hundred to a few thousand dollars) or fab a chip. The economics there are quite odd. It's actually pretty cheap to get a little bit of space on the edge of someone else's wafer for very low volume runs, as long as you don't have any time constraints. If you're a new company or project then you can get some very good deals, because the fabs want to tie you into using their cell libraries so that when you ramp up production they can charge you more. That said, these costs are easily amortised if you have enough people that want the chip. This is what a few of my colleagues are hoping for with the lowRISC effort: they're producing an entirely open source SoC and will aim to ship a few million of them on a RPi-like board (most of them were also involved in the RPi effort).

    --
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