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posted by Fnord666 on Thursday December 21 2017, @01:46AM   Printer-friendly
from the breaking-the-thermionic-limit dept.

Purdue University researchers have demonstrated a transistor using a negative capacitor made with hafnium zirconium oxide:

Researchers have experimentally demonstrated how to harness a property called negative capacitance for a new type of transistor that could reduce power consumption, validating a theory proposed in 2008 by a team at Purdue University.

[...] Capacitance, or the storage of electrical charge, normally has a positive value. However, using the ferroelectric material in a transistor's gate allows for negative capacitance, which could result in far lower power consumption to operate a transistor. Such an innovation could bring more efficient devices that run longer on a battery charge.

[...] Properly switching off [transistors] is of special importance to ensure that no electricity "leaks" through. This switching normally requires a minimum of 60 millivolts for every tenfold increase in current, a requirement called the thermionic limit. However, transistors that harness negative capacitance might break this fundamental limit, switching at far lower voltages and resulting in less power consumption.

Steep-slope hysteresis-free negative capacitance MoS2 transistors (DOI: 10.1038/s41565-017-0010-1) (DX)

2014: Negative capacitance in a ferroelectric capacitor (DOI: 10.1038/nmat4148) (DX)

2008: Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices (DOI: 10.1021/nl071804g) (DX)


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  • (Score: 5, Interesting) by takyon on Thursday December 21 2017, @02:41AM

    by takyon (881) <takyonNO@SPAMsoylentnews.org> on Thursday December 21 2017, @02:41AM (#612686) Journal

    I don't know. But if there is an interference problem, maybe that limit could be extended by shielding (where you really want low power and don't care about adding some more mass).

    This could compete against the tunnel field-effect transistor [wikipedia.org] (TFET):

    TFETs are not limited by the thermal Maxwell–Boltzmann tail of carriers, which limits MOSFET drain current subthreshold swing [wikipedia.org] to about 60 mV/decade [wikipedia.org] of current at room temperature (exactly 63 mV/decade at 300 K). The concept was proposed by Chang et al while working at IBM. Joerg Appenzeller and his colleagues at IBM were the first to demonstrate that current swings below the MOSFET’s 60-mV-per-decade limit were possible. In 2004, they reported they had created a tunnel transistor with a carbon nanotube channel and a subthreshold swing of just 40 mV per decade.

    [...] Simulations in 2013 showed that TFETs using InAs [wikipedia.org]-GaSb [wikipedia.org] may have a subthreshold swing of 33 mV/decade under ideal conditions.

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