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Apple Lisa Source Code Recovered, to be Released in 2018 by Computer History Museum

posted by janrinok on Friday December 29 2017, @01:57AM   Printer-friendly
from the memories dept.

takyon writes:

Source code for Apple's legendary Lisa operating system to be released for free in 2018

You'll soon be able to take a huge trip down memory lane when it comes to Apple's computer efforts. The Computer History Museum has announced that the source code for the Lisa, Apple's computer that predated the Mac, has been recovered and is being reviewed by Apple itself...

The announcement was made by Al Kossow, a Software Curator at the Computer History Museum. Kossow says that source code for both the operating system and applications has been recovered. Once that code is finished being reviewed by Apple, the Computer History Museum will make the code available sometime in 2018.

While you've been able to run emulators of the Lisa operating system before, this is notable as it's not just a third-party hack solution, but rather Apple is directly involved and the full code will be available for everyone.

Apple Lisa.

Original Submission

 
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  • (Score: 2) by Rich on Saturday December 30 2017, @01:52AM (1 child)

    by Rich (945) on Saturday December 30 2017, @01:52AM (#615702) Journal

    Sorry, didn't check you on everything, but I think you missed on the RAM 64Kx6 = 384K.

    If you meant KiloBIT, i misunderstood you. If you meant KiloBYTE, you show me the scheme to statically store 8 bits with six transistors. ;) Are we eventually getting multilevel DRAM???

    As you say, the preferred width of the data path correlates to the task to be done. For classic AV work, you'd get away with 16 bits for audio and 8 for video. Make that 24/12 for modern stuff. And of course the data set size determines the address width. If single-cycle operations on your preferred data and address units are available at negligible cost, you probably want them.

    I guess a simple 5- to 7-stage pipeline MIPS descendant with a vector unit is the sweet spot for massive parallelism when it's paired with around 64K RAM per cell (but I didn't deeply research any numbers).

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  • (Score: 2) by JoeMerchant on Saturday December 30 2017, @02:32AM

    by JoeMerchant (3937) on Saturday December 30 2017, @02:32AM (#615709)

    Sorry, didn't check you on everything, but I think you missed on the RAM 64Kx6 = 384K.

    If you meant KiloBIT, i misunderstood you. If you meant KiloBYTE, you show me the scheme to statically store 8 bits with six transistors. ;) Are we eventually getting multilevel DRAM???

    Of course you're right, I haven't had any coffee in a few weeks, so...

    And I never liked pipelines, which is why I love my 6502s and 6811s - you can literally just look at the opcodes and know for sure if it will get done on time or not.

    Also, the 6811 systems I built always booted up - fully functional - in about the time it took the power switch to go "click." Somehow all this multi-layered pipelined glory just doesn't seem like progress to me.

    --
    🌻🌻 [google.com]