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posted by martyb on Wednesday February 14 2018, @08:20AM   Printer-friendly
from the TOPS-that! dept.

ARM Announces Project Trillium Machine Learning IPs

Today's announcement covers the new ML processors as well as object detection processors (OD). The latter IP is a result of Arm's Apical acquirement in 2016 which saw the company add solutions for the display and camera pipelines to their IP portfolio.

Starting with the ML processor – what we're talking about here is a dedicated IP for neural network model inferencing acceleration. As we've emphasised in our NN related announcements of late, Arm also emphasises that having an architecture which is specifically designed for such workloads can have significant advantages over traditional CPU and GPU architectures. Arm also made a great focus on the need to design an architecture which is able to do optimised memory management of the data that flows through a processor when executing ML workloads. These workloads have high data reusability and minimising the in- and out-bound data through the processor is a key aspect of reaching high performance and high efficiency.

Arm's ML processor promises to reach theoretical throughput of over 4.6TOPs (8-bit integer) at target power envelopes of around 1.5W, advertising up to 3TOPs/W. The power and efficiency estimates are based on a 7nm implementation of the IP.

1 TOPS = 1 trillion operations per second.


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  • (Score: 2) by takyon on Thursday February 15 2018, @12:46AM

    by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Thursday February 15 2018, @12:46AM (#637975) Journal

    There are probably multiple ways to get it done, such as brute force simulation, a very dense and 3D neuromorphic chip that sufficiently mimics the brain, or brain matter hooked up to computers.

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