Wave Computing Adopts Low Power MIPS 64-bit Multi-Threaded Core
Wave Computing [...] announced today that it has selected a 64-bit Multi-Threaded processor core from MIPS Technologies for future AI solutions. Wave will use the MIPS core in its next generation of Dataflow Processing Unit (DPU) chips that will ship in Wave's future deep learning systems to handle device control functions including management of the real-time operating system (RTOS) and system-on-chip (SoC) subsystem.
As design complexity and software footprints continue to increase, the 64-bit MIPS architecture is being used in an even broader set of datacenter, connected consumer devices, networking products, and emerging AI applications. In addition to Wave, companies including Mobileye, Fungible, ThinCI, and DENSO, among others, are using the MIPS 64-bit processor core as they develop ground-breaking AI applications. [...] Last August, Denso group company NSITEXE, Inc. announced that it licensed the newest MIPS CPU to drive enhanced in-vehicle electronic processing.
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(Score: 0) by Anonymous Coward on Thursday March 08 2018, @07:59PM (1 child)
Pointless and incorrect. There is no PAE for amd64. You're thinking of virtual and physical address spaces. Neither is truly 64-bit wide in any current implementation.
(Score: 0) by Anonymous Coward on Friday March 09 2018, @07:43PM
( Intel® 64 and IA-32 Architectures Software Developer’s Manual [intel.com] Ch. 4.5 IA-32E PAGING )
The tables and diagrams explain what "direct" means here.