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Wave Computing and Others Adopt 64-Bit MIPS Cores

posted by martyb on Thursday March 08 2018, @02:24PM   Printer-friendly
from the it's-just-a-small-RISC dept.

takyon writes:

Wave Computing Adopts Low Power MIPS 64-bit Multi-Threaded Core

Wave Computing [...] announced today that it has selected a 64-bit Multi-Threaded processor core from MIPS Technologies for future AI solutions. Wave will use the MIPS core in its next generation of Dataflow Processing Unit (DPU) chips that will ship in Wave's future deep learning systems to handle device control functions including management of the real-time operating system (RTOS) and system-on-chip (SoC) subsystem.

From a MIPS press release:

As design complexity and software footprints continue to increase, the 64-bit MIPS architecture is being used in an even broader set of datacenter, connected consumer devices, networking products, and emerging AI applications. In addition to Wave, companies including Mobileye, Fungible, ThinCI, and DENSO, among others, are using the MIPS 64-bit processor core as they develop ground-breaking AI applications. [...] Last August, Denso group company NSITEXE, Inc. announced that it licensed the newest MIPS CPU to drive enhanced in-vehicle electronic processing.

Related: MIPS Strikes Back: 64-bit Warrior I6400 Arrives
PEZY's Next Many-Core Chip Will Include a MIPS 64-Bit CPU
ARM Cortex-A35, Snapdragon 820, and New Imagination MIPS Processors
Linux-Based, MIPS-Powered Russian All-in-One PC Launched
Imagination Technologies Acquired for $675 Million, MIPS to be Sold Off

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  • (Score: 2) by TheRaven on Friday March 09 2018, @10:34AM (1 child)

    by TheRaven (270) on Friday March 09 2018, @10:34AM (#649905) Journal
    A lot of userspace code assumes a 52-bit virtual address space or smaller. This lets it implement NaN boxing (common for implementing languages like JavaScript or Lua), where pointers are stored as invalid floating point NaNs (bits 52-62 all one) and numbers are represented as either valid numbers or valid NaNs. This lets you implement a discriminated union of a pointer or a double in a single 64-bit word and you just clear the top 12 bits before using the pointer.
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  • (Score: 2) by FatPhil on Friday March 09 2018, @02:09PM

    by FatPhil (863) <reversethis-{if.fdsa} {ta} {tnelyos-cp}> on Friday March 09 2018, @02:09PM (#649953) Homepage
    Glad to see 70's tech is still alive.
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