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posted by mrpg on Thursday June 21 2018, @02:30PM   Printer-friendly
from the embedded-risc dept.

Submitted via IRC for takyon

Wave Computing today announced that it has acquired MIPS Tech, Inc. (formerly MIPS Technologies), a global leader in RISC processor Intellectual Property (IP) and licensable CPU cores. The acquisition will accelerate Wave's strategy of offering AI acceleration from the Datacenter to the Edge of Cloud by extending the company's products beyond AI systems to now also include AI-enabled embedded solutions.

[...] For example, Datacenter-centric AI applications today need many weeks to train using coprocessors such as GPUs, only to require a different architecture for inferencing at the Edge. The lack of a common AI platform, from Datacenter to Edge, slows market growth and reduces productivity of data scientists in fields such as autonomously driven vehicles, IoT sensors and more.

[...] "Wave's integration of two industry-leading compute architectures in a single data plane/control plane solution – Dataflow and Von Neumann – will be truly unique and an industry-first. It will fuel new, ground-breaking innovations in AI and other fields."

MIPS architecture.

Source: Wave Computing Acquires MIPS Technologies

Related: Imagination Technologies Acquired for $675 Million, MIPS to be Sold Off
Wave Computing and Others Adopt 64-Bit MIPS Cores


Original Submission

 
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  • (Score: 4, Interesting) by Snotnose on Thursday June 21 2018, @04:01PM (6 children)

    by Snotnose (1623) on Thursday June 21 2018, @04:01PM (#696237)

    Back in 2000 or so if you wanted your CPU to get the Microsoft stamp of approval it had to pass a suite of tests. I got to validate a MIPS. 1 test was to ensure all 4 gig of memory was accessible. The MIPS memory architecture dedicated something like 512 meg to I/O and you couldn't put memory on it. There was a procedure for getting exceptions, which I tried to follow. The guy at Microsoft I was put in contact with basically didn't want to hear it. His attitude was "if it can't address the entire 32 bit memory space then it fails".

    Finally got it to pass, but my opinion of Microsoft dropped another several points on that project.

    As for the MIPS, it was just another architecture. Back then they were as prevalent as frameworks are today.

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  • (Score: 2) by RS3 on Thursday June 21 2018, @04:41PM (2 children)

    by RS3 (6367) on Thursday June 21 2018, @04:41PM (#696277)

    But but but: Intel, 1st meg RAM space, interrupt vectors, mapped graphics RAM, real-mode, bla bla bla?

    As I recall, many processors use memory-mapped I/O, certainly Motorola 68000, probably "Power", DEC Alpha, ...

    • (Score: 3, Informative) by Snotnose on Thursday June 21 2018, @07:05PM (1 child)

      by Snotnose (1623) on Thursday June 21 2018, @07:05PM (#696367)

      The Intel processors of the day could address the full 32 bit address space, they had a pin that told the hardware you were doing an I/O on that address. Interrupt vectors were just memory, during boot up you had to stuff the correct addresses into the table. Same with graphics, shared memory.

      What made the MIPS different was there was no memory vs I/O pin, if you talked to an address in a certain range it was I/O.

      --
      When the dust settled America realized it was saved by a porn star.
      • (Score: 2) by LoRdTAW on Thursday June 21 2018, @09:18PM

        by LoRdTAW (3755) on Thursday June 21 2018, @09:18PM (#696401) Journal

        I don't remember but wasn't the I/O space limited to 8 bits on the 8086/88? Not sure if it grew beyond that in subsequent versions of the arch e.g. 286/386/etc.

  • (Score: 2) by DannyB on Thursday June 21 2018, @06:50PM (2 children)

    by DannyB (5839) Subscriber Badge on Thursday June 21 2018, @06:50PM (#696353) Journal

    One of Microsoft's tests should have been to exclude microprocessors that have segment registers.

    But I blame the IBM PC for that. When the PC was designed, better processors were available. But IBM had to make sure to select the worst possible choice.

    It's only buckets of monopoly money that took such a botched design so far. (that sentence applies equally to Intel and Microsoft.)

    --
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    • (Score: 4, Interesting) by Snotnose on Thursday June 21 2018, @07:01PM (1 child)

      by Snotnose (1623) on Thursday June 21 2018, @07:01PM (#696363)

      The certification was for their embedded OS Window Consumer Edition, aptly named WinCE. It was meant for real time systems but would not guarantee latency, max memory usage, max stack, interrupt response time, nor pretty much any other requirement for a real time OS you can think of.

      WinCE was a steaming pile of garbage, and the test required for your CPU to be certified for it wasn't much better.

      --
      When the dust settled America realized it was saved by a porn star.
      • (Score: 2) by LoRdTAW on Thursday June 21 2018, @09:21PM

        by LoRdTAW (3755) on Thursday June 21 2018, @09:21PM (#696404) Journal

        WinCE was a steaming pile of garbage

        But muh visual studio bruh.