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posted by martyb on Tuesday August 28 2018, @01:16PM   Printer-friendly
from the taking-a-tiny-step-back dept.

GlobalFoundries has halted development of its "7nm" low power node, will fire 5% of its staff, and will also halt most development of smaller nodes (such as "5nm" and "3nm"):

GlobalFoundries on Monday announced an important strategy shift. The contract maker of semiconductors decided to cease development of bleeding edge manufacturing technologies and stop all work on its 7LP (7 nm) fabrication processes, which will not be used for any client. Instead, the company will focus on specialized process technologies for clients in emerging high-growth markets. These technologies will initially be based on the company's 14LPP/12LP platform and will include RF, embedded memory, and low power features. Because of the strategy shift, GF will cut 5% of its staff as well as renegotiate its WSA and IP-related deals with AMD and IBM. In a bid to understand more what is going on, we sat down with Gary Patton, CTO of GlobalFoundries.

[...] Along with the cancellation of the 7LP, GlobalFoundries essentially canned all pathfinding and research operations for 5 nm and 3 nm nodes. The company will continue to work with the IBM Research Alliance (in Albany, NY) until the end of this year, but GlobalFoundries is not sure it makes sense to invest in R&D for 'bleeding edge' nodes given that it does not plan to use them any time soon. The manufacturer will continue to cooperate with IMEC, which works on a broader set of technologies that will be useful for GF's upcoming specialized fabrication processes, but obviously it will refocus its priorities there as well (more on GF's future process technologies later in this article).

So, the key takeaway here is that while the 7LP platform was a bit behind TSMC's CLN7FF when it comes to HVM – and GlobalFoundries has never been first to market with leading edge bulk manufacturing technologies anyway – there were no issues with the fabrication process itself. Rather there were deeper economic reasons behind the decision.

GlobalFoundries would have needed to use deep ultraviolet (DUV) instead of extreme ultraviolet (EUV) lithography for its initial "7nm" chips. It would have also required billions of dollars of investment to succeed on the "7nm" node, only to make less "7nm" chips than its competitors. The change in plans will require further renegotiation of GlobalFoundries' and AMD's Wafer Supply Agreement (WSA).

Meanwhile, AMD will move most of its business over to TSMC, although it may consider using Samsung:

In short, AMD is now shifting over the bulk of their bleeding-edge development to TSMC. The company is careful to note that they "intend to focus the breadth" of their 7nm production at TSMC rather than all 7nm production – leaving open the possibility of using TSMC rival Samsung in the future – but the message is clear that we should expect AMD's major 7nm products to be fabbed out of TSMC now that GlobalFoundries is no longer an option.

TSMC being AMD's new bleeding-edge partner should of course come as no surprise, as TSMC has been the fab AMD has fallen back on for other projects in the past. TSMC was until the most recent generation the fab AMD used for their GPUs, and it's where their semi-custom APUs for Microsoft and Sony have been made. Meanwhile AMD and TSMC have already previously announced that some of AMD's forthcoming 7nm products, including their 7nm Vega and "Rome" EPYC CPU would be fabbed by the Taiwanese foundry. So today's announcement is largely confirmation that AMD is going to continue down this path, with most (if not all) of their other planned 7nm products ending up at TSMC as well.

NO NO NO: AMD, GlobalFoundries Renew Vows, Focus on Path to 7nm (NO)
GlobalFoundries to Spend $10-12 Billion on a 7nm Fab, Possibly $14-18 Billion for 5nm (NO NO)
AnandTech Interview With the CTO of GlobalFoundries: 7nm EUV and 5 GHz Clock Speeds (NO NO NO)

Related: TSMC to Build 7nm Process Test Chips in Q1 2018
TSMC Holds Groundbreaking Ceremony for "5nm" Fab, Production to Begin in 2020
"3nm" Test Chip Taped Out by Imec and Cadence
TSMC Details Scaling/Performance Gains Expected From "5nm CLN5" Process
Samsung Roadmap Includes "5nm", "4nm" and "3nm" Manufacturing Nodes
AMD Ratcheting Up the Pressure on Intel
Samsung Plans to Make "5nm" Chips Starting in 2019-2020
TSMC Will Make AMD's "7nm" Epyc Server CPUs


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  • (Score: 2) by JoeMerchant on Tuesday August 28 2018, @08:29PM (1 child)

    by JoeMerchant (3937) on Tuesday August 28 2018, @08:29PM (#727488)

    Now they are skipping it all.

    Crap sells - it's as easy as that, why develop something new and better when you can make money off of the existing formula?

    This is all too true where I work, also.

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  • (Score: 3, Interesting) by takyon on Tuesday August 28 2018, @08:55PM

    by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Tuesday August 28 2018, @08:55PM (#727497) Journal

    Older, mature nodes still get used years after they cease to be state-of-the-art.

    https://en.wikipedia.org/wiki/65-nanometer_process [wikipedia.org]

    Nikon Expeed 2 – 2010
    MCST Elbrus 4C – 2014
    SRISA 1890VM9Ya – 2016

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