Early to embed and early to rise? Western Digital drops veil on SweRVy RISC-V based designs
Western Digital today finally flashed the results of its vow to move a billion controller cores to RISC-V designs. WD said last year it needed an open and extensible CPU architecture for its purpose-built drive controllers and other devices. As we explained then, no one knew for sure what processors WD has used for its disk and SSD controllers, though they was likely Arm-compatible chips – such as Arm9 and Cortex-M3 parts. It is known that the firm uses Intel CPUs with its ActiveScale archive systems and Tegile all-flash and hybrid arrays.
Last year, the disk and solid-state drive manufacturer vowed that RISC-V was its future, and today it announced the SweRV core, a networked cache coherency scheme, and a SweRV instruction set simulator.
[...] The SweRV core has a two-way superscalar design and is a 32-bit, nine-stage pipeline core, meaning several instructions can be loaded at once and execute simultaneously to save time. It is also an in-order core, whose relative single core performance (a simulated 4.9 CoreMark/Mhz) is expected to exceed that of many out-of-order cores, such as the Arm Cortex A15 (actual 4.72CoreMark/Mhz). Clock speeds go up to 1.8Ghz and it will be built on a
28mm[28nm] CMOS process technology.WD said it hopes open-sourcing the core will drive development of data-centric applications such as Internet of Things (IoT), secure processing, industrial controls and more. We understand WD's ambitions for using RISC-V CPUs go beyond disk and flash drive controllers.
Previously: Western Digital to Transition Consumption of Over One Billion Cores Per Year to RISC-V
Related: WD Announces Client NVMe SSDs with In-House Controllers
(Score: 2, Funny) by Anonymous Coward on Wednesday December 05 2018, @03:56PM (9 children)
Fabricated in a 28mm process? Millimetres?
My CPU so fat she got several Yomamas in decaying orbits!
On the plus side, rad-hardening will not be on the trouble sheet for NASA adoption ...
(Score: 0) by Anonymous Coward on Wednesday December 05 2018, @04:05PM
Even in the 1960s they were using 60 micron process, so can you explain why this would be so much larger? I am a hair stylist.
https://en.wikichip.org/wiki/50_%C2%B5m_lithography_process [wikichip.org]
(Score: 4, Funny) by takyon on Wednesday December 05 2018, @04:07PM (2 children)
fixed.modernized.[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 2) by DannyB on Wednesday December 05 2018, @05:25PM
Fixed or repaired in the sense that I took my cat to the vet to be 'repaired'.
People today are educated enough to repeat what they are taught but not to question what they are taught.
(Score: 2) by bob_super on Wednesday December 05 2018, @06:14PM
9.34 atto-light-seconds or 858 nano-light-caesium-transitions
Interestingly, for the metric-haters, a light-caesium seems to be 32.6mm, or about an inch and a quarter.
(Score: 2) by Freeman on Wednesday December 05 2018, @05:06PM (2 children)
I was 50/50 typo or poor description of chip size. So, a typo or some marketing person having no idea what they were talking about when they said nanometer.
Joshua 1:9 "Be strong and of a good courage; be not afraid, neither be thou dismayed: for the Lord thy God is with thee"
(Score: 5, Funny) by nitehawk214 on Wednesday December 05 2018, @05:25PM (1 child)
You were a typo?
Did a grammar nazi put you into a consternation camp?
"Don't you ever miss the days when you used to be nostalgic?" -Loiosh
(Score: 1, Funny) by Anonymous Coward on Wednesday December 05 2018, @08:51PM
And they put him in contraction!
(Score: 0) by Anonymous Coward on Wednesday December 05 2018, @06:17PM (1 child)
Hey what's six orders of magnitude between friends?!
(Score: 4, Funny) by martyb on Thursday December 06 2018, @01:41AM
A *very* safe distance?
=)
Wit is intellect, dancing.