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posted by takyon on Wednesday January 23 2019, @09:22PM   Printer-friendly
from the class-excavation dept.

Core blimey... When is an AMD CPU core not a CPU core? It's now up to a jury of 12 to decide

A class-action lawsuit against AMD claiming false advertising over its "eight core" FX processors has been given the go-ahead by a California judge.

US district judge Haywood Gilliam last week rejected [PDF] AMD's claim that "a significant majority" of people understood the term "core" the same way it did as "not persuasive."

What tech buyers imagine represents a core when it comes to processors would be a significant part of such a lawsuit, the judge noted, and so AMD's arguments were "premature."

The so-called "eight core" chips contain four Bulldozer modules, the lawsuit notes, and these "sub-processors" each contain a pair of instruction-executing CPU cores. So, four modules times two CPU cores equals, in AMD's mind, eight CPU cores.

And here's the sticking point: these two CPU cores, within a single Bulldozer module, share caches, frontend circuitry, and a single floating point unit (FPU). These shared resources cause bottlenecks that can slow the processor, it is claimed.

The plaintiffs, who sued back in 2015, argue that they bought a chip they thought would have eight independent processor cores – the advertising said it was the "first native 8-core desktop processor" – and paid a premium for that.


Original Submission

 
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  • (Score: 4, Interesting) by FatPhil on Wednesday January 23 2019, @10:41PM (10 children)

    by FatPhil (863) <{pc-soylent} {at} {asdf.fi}> on Wednesday January 23 2019, @10:41PM (#790872) Homepage
    But how many floating point or SIMD instructions can it execute in parallel? If the answer's 4, then the argument that it's 8 cores is weakened somewhat, if the common consensus (of all morons in a hurry) is that cores contain FPUs and SIMD units. Sufficiently bullshitty marketting guys could have hidden this shortcoming by doubling and halving latency and throughput figures, of course.
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  • (Score: 2) by The Shire on Wednesday January 23 2019, @11:04PM (3 children)

    by The Shire (5824) on Wednesday January 23 2019, @11:04PM (#790889)

    I don't disagree that the underlying architecture is a mess with bottlenecks all over the place including the FPU. However the design does include 8 discrete cpu's. The fpu situation doesn't take away from there being 8 cores which can all crunch instructions simultaneously. I'm old enough to remember when cpu's and fpu's were two seperate chips and you could operate the machine without an fpu.

    I think as a matter of law you can't say this isn't an 8 core processor, it's just a really really bad one. The buyer should have reviewed the performance benchmarks before buying.

    • (Score: 2) by FatPhil on Wednesday January 23 2019, @11:50PM (2 children)

      by FatPhil (863) <{pc-soylent} {at} {asdf.fi}> on Wednesday January 23 2019, @11:50PM (#790926) Homepage
      I remember 8086s too (but owned a 68K-based box which would shit on an 8086 from a great height), and even remember when you could buy a Weitek coprocessor as a radical alternative to the x87, so my opinions are based on the same inputs as yours.

      Truth in marketting I'm no expert on, but I know that IP rights have the concept of an idiot in a hurry, and whether a reasonable man would consider their marketting materials as implying that there are 8 FPUs, and that FPUs are nowadays an intrinsic part of the CPU, are sensible questions to ask. To be honest, I think AMD will get away with it, as they could probably roll out a "but one 'core' never had identically one 'FPU', as it often had 2 or 3 ALUs doing the actual processing" type argument and even "so we actually have 12 floating point computation modules on this 8-core CPU" as their conclusion.
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      • (Score: 0) by Anonymous Coward on Thursday January 24 2019, @03:30PM (1 child)

        by Anonymous Coward on Thursday January 24 2019, @03:30PM (#791248)

        I know that IP rights have the concept of an idiot in a hurry,

        And here we have an example of why "IP rights" is a loaded term intentionally used to confuse multiple unrelated areas of law. The moron in a hurry standard is a test which applies to determine whether trademark infringement occurred. Nobody is making a trademark argument here.

        • (Score: 2) by FatPhil on Friday January 25 2019, @08:11AM

          by FatPhil (863) <{pc-soylent} {at} {asdf.fi}> on Friday January 25 2019, @08:11AM (#791665) Homepage
          Precisely what about my post gave you the impression that anything that you've said adds anything to my knowledge?

          Don't answer that, I'm guessing your response will add nothing to my knowledge.
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  • (Score: 3, Interesting) by stormreaver on Thursday January 24 2019, @12:05AM

    by stormreaver (5101) on Thursday January 24 2019, @12:05AM (#790933)

    There has been enough press over the years espousing the technological marvel that is the completely independent core that it is very understandable that buyers would assume that a core is synonymous with a complete CPU.

  • (Score: 2) by requerdanos on Thursday January 24 2019, @02:17AM (2 children)

    by requerdanos (5997) Subscriber Badge on Thursday January 24 2019, @02:17AM (#790994) Journal

    But how many floating point or SIMD instructions can it execute in parallel? If the answer's 4, then the argument that it's 8 cores is weakened somewhat

    For the 8008, the answer is 0, but it has a core.

    For the 8086, the answer is 0, but it has a core.

    For the 8088, the answer is 0, but it has a core.

    For the 80186, the answer is 0, but it has a core.

    For the 80386, the answer is 0, but it has a core.

    For the 80486SX, the answer is 0, but no sane person would argue that it doesn't have a core.

    Floating point historically is nothing but an extra added bonus, to say nothing of SIMD!

    You can't count cores by counting the abilities of things that are not located in the cores.

    • (Score: 2) by FatPhil on Friday January 25 2019, @08:09AM (1 child)

      by FatPhil (863) <{pc-soylent} {at} {asdf.fi}> on Friday January 25 2019, @08:09AM (#791664) Homepage
      Why is "history" relevent to a right-now question? You realise you've had to dig up examples from the 70s and 80s - the youngest, the 486, is now 30 years old.

      And the things you claim are not located on the cores *are* located on the cores, but are modular - the integer ALUs are just as modular as the FPU units, would you claim that the integer parts are just as much not part of the "core"?
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      • (Score: 2) by toddestan on Saturday January 26 2019, @12:27AM

        by toddestan (4982) on Saturday January 26 2019, @12:27AM (#792115)

        Furthermore those examples are applying modern terminology to historical examples. I had never heard of the term "core" as we know it today until the first "dual core" chips showed up on the market in the 2000's and we needed a term to describe these new chips that had more than one processing unit in the same package. No one referred to their 486 as a single "core" system, it was a single "CPU" system, unless of course you were made of money and had a dual "CPU" system. By the time the "core" terminology came about, the FPU had long been considered as an integral part of the processing unit and thus what was considered a "core".

  • (Score: 2) by shortscreen on Thursday January 24 2019, @10:51AM (1 child)

    by shortscreen (2252) on Thursday January 24 2019, @10:51AM (#791177) Journal

    But how many floating point or SIMD instructions can it execute in parallel?

    This could get very foggy. It's normal for some instructions to take multiple cycles. These are super scalar CPUs, which means it's also normal for multiple instructions to execute in one cycle (on one core). With the pipelined design, it's also possible for multiple instructions to be "executing" during a cycle even if none of them happen to finish on that cycle.

    I think it's reasonable to say that AMD's chip had eight cores, with pairs of cores having contention for shared FPU resources. Just like any multi-core chip has shared I/O and memory bandwidth. But chips with hyperthreading don't count the additional thread as a separate core, so another way to look at it would be to compare the functionality that is duplicated on one core with HT versus the two cores in AMD's module. (Since I don't know anything about HT I can't currently answer that)

    • (Score: 2) by FatPhil on Friday January 25 2019, @08:22AM

      by FatPhil (863) <{pc-soylent} {at} {asdf.fi}> on Friday January 25 2019, @08:22AM (#791668) Homepage
      Yeah, I'm with you. I think HT is like the question of what is alive. HT are viruses. Not cores, but containing enough such that if they get access to a core, they can do their job.
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