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posted by Fnord666 on Friday February 22 2019, @07:41PM   Printer-friendly
from the faster-and-faster dept.

Hiroshima University, National Institute of Information and Communications Technology, and Panasonic Corporation announced the successful development of a terahertz (THz) transceiver that can transmit or receive digital data at 80 gigabits per second (Gbit/s). The transceiver was implemented using silicon CMOS integrated circuit technology, which would have a great advantage for volume production. Details of the technology will be presented at the International Solid-State Circuits Conference (ISSCC) 2019 to be held from February 17 to February 21 in San Francisco, California [1].

The THz band is a new and vast frequency resource expected to be used for future ultrahigh-speed wireless communications. IEEE Standard 802.15.3d, published in October 2017, defines the use of the lower THz frequency range between 252 gigahertz (GHz) and 325 GHz (the "300-GHz band") as high-speed wireless communication channels. The research group has developed a single-chip transceiver that achieves a communication speed of 80 Gbit/s using the channel 66 defined by the Standard. The research group developed a 300-GHz-band transmitter chip capable of 105 Gbit/s [2] and a receiver chip capable of 32 Gbit/s [3] in the past few years. The group has now integrated a transmitter and a receiver into a single transceiver chip.

"We presented a CMOS transmitter that could do 105 Gbit/s in 2017, but the performance of receivers we developed, or anybody else did for that matter, were way behind [3] for a reason. We can use a technique called 'power combining' in transmitters for performance boosting, but the same technique cannot be applied to receivers. An ultrafast transmitter is useless unless an equally fast receiver is available. We have finally managed to bring the CMOS receiver performance close to 100 Gbit/s," said Prof. Minoru Fujishima, Graduate School of Advanced Sciences of Matter, Hiroshima University.


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  • (Score: 3, Informative) by takyon on Friday February 22 2019, @08:17PM (3 children)

    by takyon (881) <takyonNO@SPAMsoylentnews.org> on Friday February 22 2019, @08:17PM (#805301) Journal

    But a very forced reference to the "Singularity". You can enjoy the Kool-Aid once in a while, just don't get diabeetus.

    The Singularity is more often related to the raw computational power or a new type of architecture, such as neuromorphic. On-chip communication speed is a constraint in part because we have planar chips and DRAM is too far away. A 3D chip could alleviate many constraints.

    You could have a superintelligent AI stuck in a "box" and unable to communicate with the outside world. It doesn't require high-bandwidth communication beyond what's necessary for its processor(s) and internals to operate.

    This research could be good for something like an untethered VR headset or replacing cables in a room. It could become part of the 6G standard [soylentnews.org] that Trump is holding his breath for.

    https://en.wikipedia.org/wiki/IEEE_802.11ax [wikipedia.org]
    https://en.wikipedia.org/wiki/IEEE_802.15#IEEE_802.15.3:_High_Rate_WPAN [wikipedia.org]

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  • (Score: 1) by east coast on Friday February 22 2019, @10:52PM (1 child)

    by east coast (1625) on Friday February 22 2019, @10:52PM (#805358)

    What about distributive computing? This seems to be an area that has (had?) so much potential that now seems to be just sputtering along.

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  • (Score: 2) by HiThere on Saturday February 23 2019, @05:33PM

    by HiThere (866) Subscriber Badge on Saturday February 23 2019, @05:33PM (#805659) Journal

    This may not be a "3D chip", but it could be an enabler for 3D systems. Or even 4D, though that requires tinkering with frequencies more. Part of the question is "How directional can it be made? Under what constraints?", but this is a way around the heat problem that 3D circuits have always had.

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