Stories
Slash Boxes
Comments

SoylentNews is people

posted by martyb on Wednesday September 04 2019, @08:34PM   Printer-friendly
from the and-the-little-core-could-outcompute-a-90s-mainframe dept.

This Bizarre 5-Core Chip Could Be Intel's New Lakefield 3D Foveros CPU

Intel's upcoming 3D-stacked processor, codename Lakefield, has recently popped up in the 3DMark database. Chip detective TUM_APISAK managed to take a screenshot of the 3DMark entry.

Intel Lakefield will be the first processors to feature the chipmaker's 3D Foveros packaging. Foveros is a technology that essentially allows Intel to stack chips one on top of the other, equivalent to what storage manufacturers are doing with some new types of 3D NAND (string stacking).

According to 3DMark's report, the unidentified processor is equipped with five cores, which concurs with the core configuration for Intel's Lakefield chips. As you recall, Lakefield utilizes a design that's similar to ARM's big.LITTLE architecture. Intel complements the powerful core with other slower and more energy-efficient cores.

In Lakefield's case, Intel plans to endow the processor with one Sunny Cove core and four accompanying Atom Tremont cores. The chipmaker will cook up Lakefield chips with a combination of manufacturing process. Intel uses the 10nm node for the compute die and the 22nm node for the base die.

I'd like to see configurations with 1 small core for every 4 big cores, with the small cores handling low-level and background tasks.

Previously: Intel Details Lakefield CPU SoC With 3D Packaging and Big/Small Core Configuration
AMD Plans to Stack DRAM and SRAM on Top of its Future Processors
Intel Reveals Three New Packaging Technologies for Stitching Multiple Dies Into One Processor


Original Submission

 
This discussion has been archived. No new comments can be posted.
Display Options Threshold/Breakthrough Mark All as Read Mark All as Unread
The Fine Print: The following comments are owned by whoever posted them. We are not responsible for them in any way.
  • (Score: 2) by takyon on Wednesday September 04 2019, @09:33PM

    by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Wednesday September 04 2019, @09:33PM (#889701) Journal

    Passively:

    The chips will arrive in 5W and 7W configurations.

    At those TDPs, you probably don't need a fan.

    3DSoC will supposedly target as low as sub-1W TDP by moving the memory even closer than that. Maybe that's the future: 3D chips, ultra low TDPs, but with better performance than today's 200 Watt egg fryers. As long as you can keep everything within the on-chip memory.

    --
    [SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
    Starting Score:    1  point
    Karma-Bonus Modifier   +1  

    Total Score:   2