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posted by martyb on Monday January 27 2020, @02:29PM   Printer-friendly

Tool predicts how fast code will run on a chip:

[...] In [a] series of conference papers, the researchers describe a novel machine-learning pipeline that automates this process, making it easier, faster, and more accurate. In a paper presented at the International Conference on Machine Learning in June, the researchers presented Ithemal, a neural-network model that trains on labeled data in the form of “basic blocks” — fundamental snippets of computing instructions — to automatically predict how long it takes a given chip to execute previously unseen basic blocks. Results suggest Ithemal performs far more accurately than traditional hand-tuned models.

Then, at the November IEEE International Symposium on Workload Characterization, the researchers presented a benchmark suite of basic blocks from a variety of domains, including machine learning, compilers, cryptography, and graphics that can be used to validate performance models. They pooled more than 300,000 of the profiled blocks into an open-source dataset called BHive. During their evaluations, Ithemal predicted how fast Intel chips would run code even better than a performance model built by Intel itself.

Ultimately, developers and compilers can use the tool to generate code that runs faster and more efficiently on an ever-growing number of diverse and “black box” chip designs. “Modern computer processors are opaque, horrendously complicated, and difficult to understand. It is also incredibly challenging to write computer code that executes as fast as possible for these processors,” says co-author on all three papers Michael Carbin, an assistant professor in the Department of Electrical Engineering and Computer Science (EECS) and a researcher in the Computer Science and Artificial Intelligence Laboratory (CSAIL). “This tool is a big step forward toward fully modeling the performance of these chips for improved efficiency.”

Most recently, in a paper presented at the NeurIPS conference in December, the team proposed a new technique to automatically generate compiler optimizations.  Specifically, they automatically generate an algorithm, called Vemal, that converts certain code into vectors, which can be used for parallel computing. Vemal outperforms hand-crafted vectorization algorithms used in the LLVM compiler — a popular compiler used in the industry.

[...] “Intel’s documents are neither error-free nor complete, and Intel will omit certain things, because it’s proprietary,” says co-author on all three papers Charith Mendis, a graduate student in EECS and CSAIL. “However, when you use data, you don’t need to know the documentation. If there’s something hidden you can learn it directly from the data.”

[...] In training, the Ithemal model analyzes millions of automatically profiled basic blocks to learn exactly how different chip architectures will execute computation. Importantly, Ithemal takes raw text as input and does not require manually adding features to the input data. In testing, Ithemal can be fed previously unseen basic blocks and a given chip, and will generate a single number indicating how fast the chip will execute that code.

The researchers found Ithemal cut error rates in accuracy — meaning the difference between the predicted speed versus real-world speed — by 50 percent over traditional hand-crafted models. Further, in their next paper, they showed that Ithemal’s error rate was 10 percent, while the Intel performance-prediction model’s error rate was 20 percent on a variety of basic blocks across multiple different domains.

Articles:

Charith Mendis, Alex Renda, Saman Amarasinghe, Michael Carbin. Ithemal: Accurate, Portable and Fast Basic Block Throughput Estimation using Deep Neural Networks. http://proceedings.mlr.press/v97/mendis19a/mendis19a.pdf

Yishen Chen, Ajay Brahmakshatriya, Charith Mendis, Alex Renda, Eric Atkinson, Ondrej Sykora, Saman Amarasinghe, and Michael Carbin. BHive: A Benchmark Suite and Measurement Framework for Validating x86-64 Basic Block Performance Models http://groups.csail.mit.edu/commit/papers/19/ithemal-measurement.pdf"

Charith Mendis, Cambridge Yang, Yewen Pu, Saman Amarasinghe, Michael Carbin. Compiler Auto-Vectorization with Imitation Learning http://papers.nips.cc/paper/9604-compiler-auto-vectorization-with-imitation-learning.pdf"


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  • (Score: 2) by ikanreed on Monday January 27 2020, @07:29PM (3 children)

    by ikanreed (3164) Subscriber Badge on Monday January 27 2020, @07:29PM (#949493) Journal

    That's up there with "technically all computers halt when the inevitable decay of universal entropy sets in".

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  • (Score: 2) by DeathMonkey on Monday January 27 2020, @08:02PM (2 children)

    by DeathMonkey (1380) on Monday January 27 2020, @08:02PM (#949514) Journal

    The halting problem is solvable on Finite State Machines. [semanticscholar.org]

    A processor with finite memory is more like a Finite State Machine. It requires the infinite memory of the Turing Machine to make the halting problem unsolvable.

    • (Score: 2) by ikanreed on Monday January 27 2020, @08:17PM (1 child)

      by ikanreed (3164) Subscriber Badge on Monday January 27 2020, @08:17PM (#949529) Journal

      Inasmuch as a sufficiently large finite state machine can adequately model it, I suppose, but for a typical low end modern computer with 4GB of ram(no hard disk), that would be

      21073741824 distinct "finite" states. That's a little on the big side. I tried to render the number with python to exaggerate my point before I realized we're talking about a 3 followed by 300 million zeroes and it would probably trip the lameness filter.

      • (Score: 2) by ikanreed on Monday January 27 2020, @08:19PM

        by ikanreed (3164) Subscriber Badge on Monday January 27 2020, @08:19PM (#949531) Journal

        sorry, screwed up

        256107374182, not 2107374182. Also 3 billion digits, not 300 million. I'm very sorry for this math error.