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https://northcoastsynthesis.com/news/logic-before-ics/
So, you want a simple digital logic function in a synthesizer. Maybe it's an AND gate, or a couple of XORs, maybe as much as a shift register. How will you build it?
Today it often makes sense to just throw in a microcontroller chip. They're cheap and versatile. The same microcontroller can be programmed to serve many different purposes, so you can keep just a few types of them in stock, buy them in huge quantities, and that keeps costs down. If you need more speed, then it may make sense to use FPGAs (field-programmable gate arrays), but very few synthesizer circuits really need that much speed.
Twenty or thirty years ago, before microcontrollers were cheap, the usual way of doing a small amount of digital logic was to throw in a couple of MSI (medium-scale integration) logic chips, such as the 7400 or 74LS00 series based on bipolar transistors or the 4000 series based on CMOS. These were small logic building blocks, typically a few gates on each 14-pin or 16-pin DIP chip. There were dozens of popular chips in these series and a few hundred less-common ones. They first existed in the late 1960s but weren't cost-effective and readily available to hobbyists until the mid-1970s. Such chips still exist and you still see a lot of them in DIY designs, but they're gradually falling out of production as cheaper microcontrollers become more appealing to the large commercial interests that are most of the market.
Even further into the past, integrated circuits of any kind were too expensive to be the first choice for hobbyists, and we had to build things out of one active device (transistor or even tube) at a time. I used this kind of logic in my MSK 012 Transistor ADSR. Logic gates built with the minimum number of transistors are barely digital at all: they may be better understood as analog amplifier circuits that happen to be amplifying digital signals. The chips we usually use today, and the gates inside them, have become more complicated and involve more transistors as transistors have become cheaper, but they can be understood as just evolutionary developments from the simplest possible gates.
(Score: 0) by Anonymous Coward on Monday June 22 2020, @03:25PM (9 children)
FPGAs are "fast" for reprogramming, not fast in operation speed.
(Score: 3, Informative) by Rupert Pupnick on Monday June 22 2020, @05:36PM (3 children)
Well, fast compared to what?
Compared to a discrete implementation having only a few gates per package, an FPGA is certainly going to run faster because it is missing all of the time delaying effects of packaging and PCB. Compared to a full custom ASIC which doesn’t have the delay of programmable switches between logic units, an FPGA is slower.
(Score: 2) by RS3 on Wednesday June 24 2020, @04:04PM (2 children)
Absolutely. That and the FPGA development software will help you optimize the design and implementation. Of course, they have limits. I've seen designs using more than 1 FPGA due to timing / speed problems when jamming all of the functionality into 1 big FPGA. Divide and conquer. :)
(Score: 3, Interesting) by JoeMerchant on Wednesday June 24 2020, @05:12PM (1 child)
Of course the real thing that makes FPGAs "faster" is that you're implementing the gate logic you need, not "emulating" it with a general purpose CPU.
For example: we needed a timer-counter that would tell us how many ~450KHz oscillations had happened in the previous 500uS and how many 96MHz pulses corresponded to those oscillations, so, every 1/2ms our PLD would reset two counters and start them on the rising edge of the ~450KHz signal, on every subsequent rising edge the 96MHz counter would get its current value latched, and when the next 1/2ms period started the value of the ~450KHz counter and the corresponding latched value of the 96MHz counter would get latched before starting the whole thing over. After that, a 4MHz 8 bit micro was all we needed to read out the values from the latches, perform a single division operation, and tell us to a rather high degree of precision just what the average period of that ~450KHz oscillator was in the previous 1/2ms. Nothing in this system needed to run at faster than 100MHz clock rates.
One might try to do the same thing with GPIO ports on a fast microprocessor, even today one would get much lower precision.
🌻🌻 [google.com]
(Score: 2) by RS3 on Wednesday June 24 2020, @11:45PM
That's awesome. The only downside of your post is that it proves what I nerd I am. But very cool, and very useful fast gated pulse counter.
(Score: 1, Insightful) by Anonymous Coward on Monday June 22 2020, @05:46PM (4 children)
What? FPGAs are custom hardware.
They most definitely can outperform a CPU if the algorithms are amenable to tight implementations. Think regular expressions, computations, etc. Not so much for general business software.
(Score: 0) by Anonymous Coward on Monday June 22 2020, @08:33PM (3 children)
You only win if your workload is parallelizable. Maximum logic clock on FPGAs is currently on order of 30 MHz.
(Score: 2) by RS3 on Monday June 22 2020, @10:35PM (2 children)
Are you an actual engineer? Your statement makes no sense.
Huh? An FPGA is not some kind of multi-core SMP CPU.
You really win if you can implement asynchronous logic. We're all so used to sequential / clocked logic, like CPUs, some people tend to forget (or maybe never knew about) async: just gates, no clocking / sequential operation.
You're off by more than an order of magnitude. A very brief web search shows some Xilinx Artix-7 chips and there are references to clock speeds over 600 MHz. https://www.xilinx.com/support/documentation/data_sheets/ds181_Artix_7_Data_Sheet.pdf [xilinx.com]
However, and importantly: it all depends on the logic / functionality you're trying to implement. You may have some kind of complex thing that just can't go over 30 MHz, but that seems unlikely, and could likely be optimized if much more speed is needed (engineer + Vivado, Xilinx design software).
(Score: 0) by Anonymous Coward on Tuesday June 23 2020, @02:37AM (1 child)
I am an engineer. I question your understanding of the utility of FPGAs when you apparently don't immediately think of Amdahl's law.
(Score: 2) by RS3 on Tuesday June 23 2020, @05:02AM
Wow! How did you read my mind? I guess I subliminally encoded that in my last post? Stunning!
Seriously, what are you talking about? Care to elaborate?