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posted by Fnord666 on Tuesday August 18 2020, @10:45AM   Printer-friendly

New IBM POWER10 processor has transparent memory encryption for end-to-end security - Help Net Security:

IBM revealed the next generation of its IBM POWER CPU family: IBM POWER10. Designed to offer a platform to meet the unique needs of enterprise hybrid cloud computing, the IBM POWER10 processor uses a design focused on energy efficiency and performance in a 7nm form factor with an expected improvement of up to 3x greater processor energy efficiency, workload capacity, and container density than the IBM POWER9 processor.

Designed over five years with hundreds of new and pending patents, the IBM POWER10 processor is an important evolution in IBM's roadmap for POWER. Systems taking advantage of IBM POWER10 are expected to be available in the second half of 2021.

[...] IBM POWER10 is IBM's first commercialized processor built using 7nm process technology. IBM Research has been partnering with Samsung Electronics on research and development for more than a decade, including demonstration of the semiconductor industry's first 7nm test chips through IBM's Research Alliance.

[...] IBM POWER10 offers hardware memory encryption for end-to-end security and faster cryptography performance thanks to additional AES encryption engines for both today's leading encryption standards as well as anticipated future encryption protocols like quantum-safe cryptography and fully homomorphic encryption.

Further, to address new security considerations associated with the higher density of containers, IBM POWER10 is designed to deliver new hardware-enforced container protection and isolation capabilities co-developed with the IBM POWER10 firmware.

If a container were to be compromised, the POWER10 processor is designed to be able to prevent other containers in the same Virtual Machine (VM) from being affected by the same intrusion.

[...] In a breakthrough new technology called Memory Inception, the new processor is designed to allow any of the IBM POWER10 processor-based systems in a cluster to access and share each other's memory, creating multi-Petabyte sized memory clusters.

For both cloud users and providers, Memory Inception offers the potential to drive cost and energy savings, as cloud providers can offer more capability using fewer servers, while cloud users can lease fewer resources to meet their IT needs.

[...] With an embedded Matrix Math Accelerator, the IBM POWER10 processor is expected to achieve 10x, 15x, and 20x faster AI inference for FP32, BFloat16 and INT8 calculations respectively to improve performance for enterprise AI inference workloads as compared to IBM POWER9, helping enterprises take the AI models they trained and put them to work in the field.

[...] Samsung Electronics will manufacture the processor, combining Samsung's semiconductor manufacturing technology with IBM's CPU designs.


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  • (Score: 2) by DannyB on Tuesday August 18 2020, @04:20PM (1 child)

    by DannyB (5839) Subscriber Badge on Tuesday August 18 2020, @04:20PM (#1038399) Journal

    I thought it is that a GPU may have several hundred cores that execute SIMD. Now that is nice, don't get me wrong.

    But if I had enough CPU cores I could still do all that same processing.

    And, many CPU cores can also do other work that doesn't fit well with SIMD. GPUs have created ways of programming them in C. The problem is that if you have an IF-ELSE construction, then the way this works is that all of the cores execute the THEN instructions followed by the ELSE instructions. On some cores, only the THEN instructions actually do something, and on other cores with opposite condition, the ELSE instructions do something. But the other cores step through those instructions together. Now build a more complex algorithm this way, and each IF creates another set of SIMD instructions that do the THEN and ELSE.

    I would be happy for someone to correct any misunderstanding I might have about this.

    I also don't see how to easily work with very large integers, many words wide, in a GPU. Where each "process" is doing calculations on big integers. With a lot of ordinary CPU cores, I would just write conventional code, make sure each "work unit" is large enough to significantly dominate the cost of starting / stopping a thread, and then throw it out at all of the available cores.

    People who argue with this, at least here on SN, seem to see the world as if the ONLY interesting problems are ones that can be solved on a GPU efficiently.

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  • (Score: 1) by fustakrakich on Tuesday August 18 2020, @06:28PM

    by fustakrakich (6150) on Tuesday August 18 2020, @06:28PM (#1038456) Journal

    Don't make the package too small, or you won't be able to dissipate the heat

    Aren't we supposed to be able to 3D print this stuff by now? There's been lots of chatter about it over the years

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