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posted by janrinok on Tuesday June 02 2015, @01:53PM   Printer-friendly
from the big-business dept.

Two members of our community have submitted information on the Intel purchase of Altera:

Intel To Buy Altera For 16.7 billion USD

Intel bought chipmaker Altera for 16.7 billion US$. This follows another huge purchase in the semiconductor industry last week, when Avago snapped up Broadcom for $37 billion US$. This has been a record year for consolidation within the industry, as companies struggle to deal with slowing growth and stagnating stock prices. Altera had already rejected an offer from Intel, but shareholders pressured them to reconsider. "Acquiring Altera may help Intel defend and extend its most profitable business: supplying server chips used in data centers. While sales of semiconductors for PCs are declining as more consumers rely on tablets and smartphones to get online, the data centers needed to churn out information and services for those mobile devices are driving orders for higher-end Intel processors and shoring up profitability. Altera has a huge FPGA business.

Perhaps this will impact Altera FPGA Linux support?

Intel Acquires Altera for $16.7 Billion

Intel Corporation has announced that it is buying Altera Corporation for $16.7 billion in cash. The deal will allow Intel to access potentially valuable field-programmable gate array (FPGA) revenue streams and integrate FPGAs into Xeon chips to try and maintain its dominance in datacenters. Altera has already been using Intel's 14nm process to make its Stratix FPGAs.

The Platform has more in-depth analysis of the deal:

The first hedge that Intel is making with the Altera acquisition is that a certain portion of the compute environment that it more or less owns in the datacenter will shift from CPUs to FPGAs.

In the conference call announcing the deal for Altera, Intel CEO Brian Krzanich said that up to a third of cloud service providers – what we here at The Platform call hyperscalers – could be using hybrid CPU-FPGA server nodes for their workloads by 2020. (This is an Intel estimate.) Intel's plan is to get a Xeon processor and an Altera FPGA on the same chip package by the end of 2016 – Data Center Group general manager Diane Bryant showed off a prototype of such a device in early 2014 – and ramp its production through 2017, with a follow-on product that actually puts the CPU and the FPGA circuits on the same die in monolithic fashion "shortly after that."

Intel plans to create a hybrid Atom-FPGA product aimed at the so-called Internet of Things telemetry market, and this will be a monolithic design as well, according to Krzanich; the company is right now examining whether it needs an interim Atom and FPGA product that shares a single package but are not etched on a single die.


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  • (Score: 3, Informative) by Katastic on Wednesday June 03 2015, @02:27AM

    by Katastic (3340) on Wednesday June 03 2015, @02:27AM (#191402)

    I've consistently tried to tell people about FPGAs but they're all so far up their butts they refuse to even read about them.

    FPGAs aren't CPUs. "Soft cores" (CPUs using an FPGA) are not faster than regular CPUs, and are not the purpose of FPGAs. Soft cores are ONLY for experimentation of designs--nobody is using them in production environments except as a low-end auxiliary processor to talk to and deal with higher-order problems. (e.g. your bitstream coupled to a TCP/IP stack)

    CPU's do one complex thing, very well. GPU's do many things, less complex. FPGAs are further down the line. They do thousands if not millions of things at the same time. They are programmable logic gates that are all always running. Unlike 99% of code that only gets executed at one time, every piece of "code" in an FPGAs is always running. (*We're talking in general, laymen terms here.) A CPU uses memory reads, registers, and branches all in order. One at a time. An FPGA is always reading, always processing, always outputting at the same time. FPGA's running @ 100 MHz can have encryption throughputs riving clusters of Xeons. (See lower.) But their designs have to be much much simpler. They tend to focus on low-level problems that can run everything to run in parallel. They also consume TINY amounts of power and produce little heat.

    So why put an FPGA inside a CPU? I'll tell you why! So a CPU can have access to custom HARDWARE at a moments notice. Running a server? The FPGA will reflash itself to have more encryption units. Start Doom 5? It'll reflash itself to have hardware and texturing units. Want to do super fast, super low latency sound, software radio, or video processing? BAM.

    Altera specializes in FPGA's that allow "partial reconfiguration." That means they can reflash only REGIONS of the FPGA while the rest remain running. So whereas older FPGA's had to be shut off, completely flashed, and rerun, these new ones can keep running live at all times.

    It's a dream world of new possibilities, and all we needed was one company to commit the big bucks to design a new tool chain.

    Check out these jaw-dropping stats of an FPGA cluster vs a Quad-Core 2.5 GHz Xeon in 2009:

    http://i.imgur.com/byjmEDG.png [imgur.com]

    A 64-FPGA module required 104 watts, and the equivalent Xeon "Cluster" would require 72 KILOWATTS of energy consumption. Yet these guys then made a 512-FPGA cluster which ran 753,000,000 RC4 keys a second. They ran the entire key space in 3 minutes. All with common hardware, some professors and grad students on a grant. Imagine what real businesses can and DO do every day with these things. (Not to mention what the NSA already DOES do unless they're complete idiots.) Then imagine what they could do inside your computer with a super easy GCC-like toolchain and no need to play around with wiring schematics and protocols to get data to and from your FPGA. FPGAs and ASICs dominate the bitcoin world because they are pound-for-pound the highest performance in terms of hardware cost and power cost.

    It's gonna be a fun next few years!

    Lastly, here's the paper I cited:

    http://cc.doc.ic.ac.uk/projects/prj_cube/spl09cube.pdf [ic.ac.uk]

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