SoylentNews

takyon writes:

Tom's Hardware reports on a crude method that may enable the production of vertical/3D NAND with more than 100 layers in the future:

Today's 3D NAND weighs in at 32 to 48 layers, but increasing the density beyond 100 layers appears to be an impossible challenge due to the limitations of high-aspect ratio etch tools, which etch the holes in the NAND (1.8 billion for Samsung 48-layer NAND). Today's tools have 30:1 to 40:1 aspect ratios for 32- and 48-layer NAND, respectively, but creating 64-layer NAND will require an aspect ratio of 60:1 to 70:1. The only problem? There are no tools that can achieve that aspect ratio.

Several NAND vendors are reportedly developing a new "string-stacking" method that will merely stack the 3D NAND devices on top of each other. For instance, three 48-layer stacks will be stacked upon each other to create a 144-layer chip. String stacking may allow for scaling up to 300 layers, but the challenge will be how to link the stacks and produce it in a cost-effective manner. Unfortunately, the NAND fabs have not even mastered that for standard 3D NAND as of yet.

In other NAND news, there may be a shortage of 3D NAND, indicated by Samsung using 16nm 2D TLC NAND in its new 750 EVO SSDs.

Original Submission

takyon writes:

The wide adoption of 3D/vertical NAND with increased feature sizes and endurance will apparently lead to the introduction of low-cost QLC (4 bits per cell) NAND. 3D NAND's increased flash cell size and overprovisioning will counteract the reduction in endurance caused by moving from 3 to 4 bits per cell:

We covered the TSV [Through Silicon Vias] notion here and now take a look at quadruple level cell (QLC) flash technology. Toshiba will present on this and TSVs in a keynote session at the August 6-9 Flash Memory Summit in Santa Clara. The session abstract notes: "New technologies such as QLC (Quadruple Level Cell) BiCS FLASH offer high density, low-cost solutions, while TSV (Through Silicon Via) NAND offers high performance with significant power reduction."

To recap, BiCS stands for Bit Cost Scalable and is Toshiba and flash foundry partner WDC's approach to 3D NAND, the layering of ordinary or planer (2D) NAND chips atop each other. We have 48-layer cells in production and 64-layer ones coming with 96-layer and even 128-layer chips in prospect. Progress beyond 64-layers has problems due to the difficulties in etching holes through the layers and so the TSV idea is to have two layers of layering: two 64-layer chips one on top of the other, with holes through them both, TSVs, for wiring to hold them together and carry out cell activity functions as well.

[...] Back in March, Jeff Ohshima, a Toshiba executive, presented on TSVs and QLC flash at the Non-Volatile Memory Workshop and suggested 88TB QLC 3D NAND SSDs with a 500 write cycle life could be put into production. The Flash Memory Summit keynote could add more colour to this.

Related:

Toshiba and SanDisk Announce 48-Layer 256 Gb 3D NAND
Toshiba Brings Through-Silicon Vias to NAND Flash
Western Digital, SanDisk, and the NAND Market
"String-Stacking" Being Developed to Enable 3D NAND With More Than 100 Layers (NAND devices with 64 layers and above will be difficult to create, so stacking 48-layer devices will be used to increase density)

Original Submission

takyon writes:

Western Digital has announced its intention to include 3D Resistive RAM (ReRAM) as storage class memory (SCM) in future SSDs and other products:

Without making any significant announcements this week, Western Digital indicated that it would use some of the things it has learnt while developing its BiCS 3D NAND to produce its ReRAM chips. The company claims that its ReRAM will feature a multi-layer cross-point implementation, something it originally revealed a while ago.

Perhaps, the most important announcement regarding the 3D ReRAM by Western Digital is the claim about scale and capital efficiency of the new memory. Essentially, this could mean that the company plans to use its manufacturing capacities as well as its infrastructure (testing, packaging, etc.) in Yokkaichi, Japan, to make 3D ReRAM. Remember that SCM is at this point more expensive than NAND, hence, it makes sense to continue using the current fabs and equipment to build both types of non-volatile memory so ensure that the SCM part of the business remains profitable.

One of WD's slides projects SCM as 50% the cost per gigabyte of DRAM in 2017, declining to 5% by 2023.

Samsung introduced its fourth generation of vertical NAND, with 64 layers:

With a per-die capacity of 512Gb (64GB), Samsung can now put 1TB of TLC flash in a single package. This means most product lines will be seeing an increase in capacity at the high end of the range. Their BGA SSD products will be offering 1TB capacity even in the 11.5mm by 13mm form factor. The 16TB PM1633a SAS SSD will be eclipsed by the new 32TB PM1643. Likely to be further out, the PM1725 PCIe add-in card SSD will be succeeded by the PM1735 with a PCIe 4 x8 host interface.

Complementing the NAND update will be a new non-standard oversized M.2 form factor 32mm wide and 114mm long, compared to the typical enterprise M.2 size of 22mm by 110mm. A little extra room can go a long way, and Samsung will be using it to produce 8TB drives. These will be enterprise SSDs and Samsung showed a diagram of these enabling 256TB of flash in a 1U server. Samsung will also be producing 4TB drives in standard M.2 sizing.

In what is likely a bid to steal some thunder from 3D XPoint memory before it can ship, Samsung announced Z-NAND memory technology and a Z-SSD product based around Z-NAND and a new SSD controller. They said nothing about the operating principles of Z-NAND, but they did talk about their plans for the Z-SSD products.

Original Submission

takyon writes:

Samsung recently announced its fourth generation of 3D/vertical NAND, with 64 layers and a capacity of 512Gb (64GB) per die. Now SK Hynix is announcing its plans for 512 Gb V-NAND dies with 72 layers:

Later this year SK Hynix intends to start volume production of 72-layer 3D TLC NAND (3D-V4) memory and this is where things start to get interesting. Initially, SK Hynix intends to produce 256 Gb 3D TLC ICs and these are going to be available already in Q2 2017, according to the company's product catalog. Later on, sometimes in Q4, the company plans to introduce 512 Gb 3D TLC ICs (64 GB), which will help it to significantly increase capacities of SSDs and other devices featuring NAND flash.

What is important about SK Hynix's fourth-gen 3D NAND is that it will feature block size of 13.5 MB, which will increase the performance of such ICs compared to 3D-V3 and 3D-V2 that have a block size of 9 MB. At this point, we do not know whether SK Hynix intends to increase interface speed of its 512 Gb 3D-V4 ICs to compensate lower parallelism in lower-capacity SSDs, like Samsung did with its high-capacity 64-layer 3D V-NAND chips. What we do know is that SK Hynix's catalog already includes NAND multi-chip packages of 8192 Gb capacity (1 TB) that will enable high-capacity SSDs in smaller form-factors (e.g., [2 TB] single-sided M.2). Meanwhile, 64 GB NAND flash chips may force SK Hynix and its partners to abandon low-capacity SSDs (i.e., 120/128 GB) unless there is sufficient demand.

The article also talks about the company's plans for 18nm DRAM and fabrication facility expansion.

Related: Toshiba and SanDisk Announce 48-Layer 256 Gb 3D NAND
Toshiba Teasing QLC 3D NAND and TSV for More Layers

Original Submission

takyon writes:

SK Hynix is currently developing 96-layer and 128-layer 3D NAND with 3 bits per cell, but may be skipping quad-level cell 3D NAND for some time:

The 64-layer 3D NAND about to land from Micron and Toshiba certainly sounds impressive, but it pales in comparison to what Sk Hynix is working on for future release. The company is developing 96-layer and 128-layer 3D NAND flash. The new flash won't be available for a few years, but that makes it no less exciting. We have yet to see 72-layer 3D from Sk Hynix in our lab, but it will begin shipping soon in the PC401 using 256Gbit TLC die, according to the UNH-IOL list of tested products.

The information we found about the successor to 256Gbit 72-layer 3D TLC shows 96 layers with 512Gbit die capacity. The follow up to that is a massive 1Tbit die from 128-layer TLC from the other South Korean SSD manufacturer with full vertical integration.

Toshiba (or whichever company acquires Toshiba's memory division) may be more likely to introduce QLC 3D NAND.

Previously:
SK Hynix Plans 72-Layer 512 Gb NAND for Late 2017
64-Layer 3D NAND at Computex

Original Submission

takyon writes:

SSDs with 64 layers of 3D NAND are now available:

Today Intel is introducing their SSD 545s, the first product with their new 64-layer 3D NAND flash memory and, in a move that gives Intel a little bit of bragging rights, the first SSD on the market to use 64-layer 3D NAND from any manufacturer.

The Intel SSD 545s is a mainstream consumer SSD, which these days means it's using the SATA interface and TLC NAND flash. The 545s is the successor to last year's Intel SSD 540s, which was in many ways a filler product to cover up inconvenient gaps in Intel's SSD technology roadmap. When the 540s launched, Intel's first generation of 3D NAND was not quite ready, and Intel had no cost-competitive planar NAND of their own due to skipping the 16nm node at IMFT. This forced Intel to use 16nm TLC from SK Hynix in the 540s. Less unusual for Intel, the 540s also used a third-party SSD controller: Silicon Motion's SM2258. Silicon Motion's SSD controllers are seldom the fastest, but performance is usually decent and the cost is low. Intel's in-house SATA SSD controllers were enterprise-focused and not ready to compete in the new TLC-based consumer market.

[...] Intel will be using their smaller 256Gb 64L TLC die for all capacities of the 545s, rather than adopting the 512Gb 64L TLC part for the larger models. The 512Gb die is not yet in volume production and Intel plans to have the full range of 545s models on the market before the 512Gb parts are available in volume. Once the 512Gb parts are available we can expect to seem them used in other product families to enable even higher drive capacities, but it is reassuring to see Intel choosing the performance advantages of smaller more numerous dies for the mainstream consumer product range. Meanwhile, over the rest of this year, Intel plans to incorporate 64L 3D NAND into SSDs in every product segment. Most of those products are still under wraps, but the Pro 5450s and E 5100s are on the way as the OEM and embedded versions of the 545s.

Previously: SK Hynix Plans 72-Layer 512 Gb NAND for Late 2017
64-Layer 3D NAND at Computex
SK Hynix Developing 96 and 128-Layer TLC 3D NAND

Original Submission

takyon writes:

Micron Non-Volatile Update (Q2'18): 96L 3D NAND in H2, 4th Gen 3D NAND Enroute, Sales of 3D XPoint Disappoint

At present Micron is ramping up production of its 64-layer 3D TLC NAND memory (2nd Gen 3D NAND) and last quarter it achieved production output crossover with other types of NAND the company manufactures. This is particularly good news for Micron because 64-layer 3D NAND devices are significantly more cost-efficient in terms of cost per bit compared to 32-layer 3D NAND memory, which allows Micron to earn more. In fact, 64-layer 3D NAND enabled Micron to launch two major products. First, the company released its 2.5-inch SATA 5200 ECO SSDs with up to 7.68 TB capacity in January targeting mainstream servers. Second, 64-layer 3D QLC memory enabled Micron to compete for nearline storage segment with its 5210 ION drives launched back in May.

Earlier this month we reported that at least two developers of SSD controllers have qualified Micron's 96-layer 3D TLC NAND memory for SSDs. During the conference call, Micron confirmed that it was on track to ship its 3rd Gen 3D NAND in volumes for commercial products in the second half of calendar 2018. It is not clear whether the initial batches of such memory will be used for various removable storage solutions (memory cards, USB flash drives, etc.) as it happens usually, but it is evident that Micron's 96-layer 3D NAND is making a good progress with designers of SSD controllers. Maxio Technology intends to use Micron's 3D TLC B27A memory for inexpensive drives based on its MAS0902A-B2C DRAM-less controller, whereas Silicon Motion is so confident of this memory that it has qualified it with its top-of-the-range SM2262EN controller for high-performance SSDs.

[...] While sales of Micron's SSDs are growing (and currently account for 50% of Micron's storage business revenue, or $507 million) and the company continues to shift to high-value specialized NAND products from selling raw NAND chips, shipments of 3D XPoint are below expectations. According to Micron, it sold "very little" 3D XPoint memory to its unnamed parter (almost certainly Intel) during its Q3 FY2018.

Micron's 4th-generation 3D NAND could have up to 128 layers.

Related: "String-Stacking" Being Developed to Enable 3D NAND With More Than 100 Layers
64-Layer 3D NAND at Computex
SK Hynix Developing 96 and 128-Layer TLC 3D NAND
Intel and Micron Boost 3D XPoint Production
Micron Launches First QLC NAND SSD

Original Submission