from the FOSH-(like-FOSS,-but-for-hardware) dept.
lowRISC is a project to create a "fully open-sourced, Linux-capable, system-on-a-chip"; it is based around RISC-V, the "Free and Open RISC Instruction Set Architecture", which is meant to provide an extensible platform that scales from low-level microcontrollers up to highly parallel, high-bandwidth general-purpose supercomputers.
Here is the release announcement:
The lowRISC 0.4 milestone release is now available. The various changes are best described in our accompanying documentation, but in summary this release:
Moves forward our support for tagged memory by re-integrating the tag cache, reducing overhead with a hierarchical scheme. This will significantly reduce caches misses caused by tagged memory accesses where tags are distributed sparsely.
Integrates support for specifying and configuring tag propagation and exception behaviour.
A PULPino based "minion core" has been integrated, and is used to provide peripherals such as the SD card interface, keyboard, and VGA tex display (when using the Nexys4 DDR FPGA development board).
Please report any issues on our GitHub repository, or discuss on our mailing list. As always, thank you to everyone who has contributed in any way - whether it's advice and feedback, bug reports, code, or ideas.
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From the lowRISC blog:
We are looking for a talented hardware engineer to join the lowRISC team and help make our vision for an open source, secure, and flexible SoC a reality. Apply now!
lowRISC C.I.C. is a not-for-profit company that aims to demonstrate, promote and support the use of open-source hardware. The lowRISC project was established in 2014 with the aim of bringing the benefits of open-source to the hardware world. It is working to do this by producing a high quality, secure, open, and flexible System-on-Chip (SoC) platform. lowRISC C.I.C. also provides hardware and software services to support the growing RISC-V ecosystem. Our expertise includes the LLVM Compiler, hardware security extensions and RISC-V tools, hardware and processor design.
[...] lowRISC is an ambitious project with a small core team, so you will be heavily involved in the project's development direction. This role will involve frequent work with external contributors and collaborators. While much of the work will be at the hardware level the post will offer experience of the full hardware/software stack, higher-level simulation tools and architectural design issues.
Some practical experience of hardware design with a HDL such as Verilog/SystemVerilog is essential, as is a good knowledge of the HW/SW stack. Ideally, candidates will also have experience or demonstrated interest in some of: SoC design, large-scale open source development, hardware or software security, technical documentation, board support package development and driver development. Industrial experience and higher degree levels are valued, but we would be happy to consider an enthusiastic recent graduate with a strong academic record.
Informal enquires should be made to Alex Bradbury asb@lowrisc.org.
takyon (thanks to an AC): lowRISC is a project to create a "fully open-sourced, Linux-capable, system-on-a-chip"; it is based around RISC-V, the "Free and Open RISC Instruction Set Architecture", which is meant to provide an extensible platform that scales from low-level microcontrollers up to highly parallel, high-bandwidth general-purpose supercomputers.
Reduced instruction set computer (RISC).
Previously: RISC-V Projects to Collaborate
LowRISC Announces its 0.4 Milestone Release
SiFive and UltraSoC Partner to Accelerate RISC-V Development Through DesignShare
(Score: 0) by Anonymous Coward on Saturday June 10 2017, @10:48PM (2 children)
And not even an openly documented/open development tools FPGA at that.
When are we going to see a board based on iCE40 FPGAs offering a chip like this?
The PicoRV32 will almost fit into the 4k model chips, and will definitely fit into the 8k chips, allowing either qfp or bga packages to be used. With maybe four of those on a board, you should be able to build an under 100-200 dollar FPGA dev board using all open tools that is capable of running a RISC-V, linux, and ideally some real peripherals instead of an embedded fail-board, that limits you far more than a Raspberry Pi ever did.
(Score: 0) by Anonymous Coward on Sunday June 11 2017, @01:52PM (1 child)
This. What good is an open hardware design when there are no open tools for production?
(Score: 0) by Anonymous Coward on Sunday June 11 2017, @02:09PM
"What good is anything ever...."
Pathetic nihilism.