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posted by mrpg on Friday January 19 2018, @01:15AM   Printer-friendly
from the to-surf-the-web dept.

Samsung has announced the mass production of 16 Gb GDDR6 SDRAM chips with a higher-than-expected pin speed. The chips could see use in upcoming graphics cards that are not equipped with High Bandwidth Memory:

Samsung has beaten SK Hynix and Micron to be the first to mass produce GDDR6 memory chips. Samsung's 16Gb (2GB) chips are fabricated on a 10nm process and run at 1.35V. The new chips have a whopping 18Gb/s pin speed and will be able to reach a transfer rate of 72GB/s. Samsung's current 8Gb (1GB) GDDR5 memory chips, besides having half the density, work at 1.55V with up to 9Gb/s pin speeds. In a pre-CES 2018 press release, Samsung briefly mentioned the impending release of these chips. However, the speed on release is significantly faster than the earlier stated 16Gb/s pin speed and 64GB/s transfer rate.

18 Gbps exceeds what the JEDEC standard calls for.

Also at Engadget and Wccftech.

Related: GDDR5X Standard Finalized by JEDEC
DDR5 Standard to be Finalized by JEDEC in 2018
SK Hynix to Begin Shipping GDDR6 Memory in Early 2018
Samsung's Second Generation 10nm-Class DRAM in Production

Original Submission

Related Stories

GDDR5X Standard Finalized by JEDEC 17 comments

JEDEC has finalized the GDDR5X SGRAM specification:

The new technology is designed to improve bandwidth available to high-performance graphics processing units without fundamentally changing the memory architecture of graphics cards or memory technology itself, similar to other generations of GDDR, although these new specifications are arguably pushing the phyiscal[sic] limits of the technology and hardware in its current form. The GDDR5X SGRAM (synchronous graphics random access memory) standard is based on the GDDR5 technology introduced in 2007 and first used in 2008. The GDDR5X standard brings three key improvements to the well-established GDDR5: it increases data-rates by up to a factor of two, it improves energy efficiency of high-end memory, and it defines new capacities of memory chips to enable denser memory configurations of add-in graphics boards or other devices. What is very important for developers of chips and makers of graphics cards is that the GDDR5X should not require drastic changes to designs of graphics cards, and the general feature-set of GDDR5 remains unchanged (and hence why it is not being called GDDR6).

[...] The key improvement of the GDDR5X standard compared to the predecessor is its all-new 16n prefetch architecture, which enables up to 512 bit (64 Bytes) per array read or write access. By contrast, the GDDR5 technology features 8n prefetch architecture and can read or write up to 256 bit (32 Bytes) of data per cycle. Doubled prefetch and increased data transfer rates are expected to double effective memory bandwidth of GDDR5X sub-systems. However, actual performance of graphics cards will depend not just on DRAM architecture and frequencies, but also on memory controllers and applications. Therefore, we will need to test actual hardware to find out actual real-world benefits of the new memory.

What purpose does GDDR5X serve if superior 1st and 2nd generation High Bandwidth Memory (HBM) are around? GDDR5X memory will be cheaper than HBM and its use is more of an evolutionary than revolutionary change from existing GDDR5-based hardware.

Original Submission

DDR5 Standard to be Finalized by JEDEC in 2018 13 comments

JEDEC has announced that it expects to finalize the DDR5 standard by next year. It says that DDR5 will double bandwidth and density, and increase power efficiency, presumably by lowering the operating voltages again (perhaps to 1.1 V). Availability of DDR5 modules is expected by 2020:

You may have just upgraded your computer to use DDR4 recently or you may still be using DDR3, but in either case, nothing stays new forever. JEDEC, the organization in charge of defining new standards for computer memory, says that it will be demoing the next-generation DDR5 standard in June of this year and finalizing the standard sometime in 2018. DDR5 promises double the memory bandwidth and density of DDR4, and JEDEC says it will also be more power-efficient, though the organization didn't release any specific numbers or targets.

The DDR4 SDRAM specification was finalized in 2012, and DDR3 in 2007, so DDR5's arrival is to be expected (cue the Soylentils still using DDR2). One way to double the memory bandwidth of DDR5 is to double the DRAM prefetch to 16n, matching GDDR5X.

Graphics cards are beginning to ship with GDDR5X. Some graphics cards and Knights Landing Xeon Phi chips include High Bandwidth Memory (HBM). A third generation of HBM will offer increased memory bandwidth, density, and more than 8 dies in a stack. Samsung has also talked about a cheaper version of HBM for consumers with a lower total bandwidth. SPARC64 XIfx chips include Hybrid Memory Cube. GDDR6 SDRAM could raise per-pin bandwidth to 14 Gbps, from the 10-14 Gbps of GDDR5X, while lowering power consumption.

Original Submission

SK Hynix to Begin Shipping GDDR6 Memory in Early 2018 20 comments

SK Hynix is almost ready to produce GDDR6 memory with higher than expected per-pin bandwidth:

In a surprising move, SK Hynix has announced its first memory chips based on the yet-unpublished GDDR6 standard. The new DRAM devices for video cards have capacity of 8 Gb and run at 16 Gbps per pin data rate, which is significantly higher than both standard GDDR5 and Micron's unique GDDR5X format. SK Hynix plans to produce its GDDR6 ICs in volume by early 2018.

GDDR5 memory has been used for top-of-the-range video cards for over seven years, since summer 2008 to present. Throughout its active lifespan, GDDR5 increased its data rate by over two times, from 3.6 Gbps to 9 Gbps, whereas its per chip capacities increased by 16 times from 512 Mb to 8 Gb. In fact, numerous high-end graphics cards, such as NVIDIA's GeForce GTX 1060 and 1070, still rely on the GDDR5 technology, which is not going anywhere even after the launch of Micron's GDDR5X with up to 12 Gbps data rate per pin in 2016. As it appears, GDDR6 will be used for high-end graphics cards starting in 2018, just two years after the introduction of GDDR5X.

Previously: Samsung Announces Mass Production of HBM2 DRAM
DDR5 Standard to be Finalized by JEDEC in 2018

Original Submission

Samsung's Second Generation 10nm-Class DRAM in Production 1 comment

Samsung's second generation ("1y-nm") 8 Gb DDR4 DRAM dies are being mass produced:

Samsung late on Wednesday said that it had initiated mass production of DDR4 memory chips using its second generation '10 nm-class' fabrication process. The new manufacturing technology shrinks die size of the new DRAM chips and improves their performance as well as energy efficiency. To do that, the process uses new circuit designs featuring air spacers (for the first time in DRAM industry). The new DRAM ICs (integrated circuits) can operate at 3600 Mbit/s per pin data rate (DDR4-3600) at standard DDR4 voltages and have been validated with major CPU manufacturers already.

[...] Samsung's new DDR4 chip produced using the company's 1y nm fabrication process has an 8-gigabit capacity and supports 3600 MT/s data transfer rate at 1.2 V. The new D-die DRAM runs 12.5% faster than its direct predecessor (known as Samsung C-die, rated for 3200 MT/s) and is claimed to be up to 15% more energy efficient as well. In addition, the latest 8Gb DDR4 ICs use a new in-cell data sensing system that offers a more accurate determination of the data stored in each cell and which helps to increase the level of integration (i.e., make cells smaller) and therefore shrink die size.

Samsung says that the new 8Gb DDR4 chips feature an "approximate 30% productivity gain" when compared to similar chips made using the 1x nm manufacturing tech.
UPDATE 12/21: Samsung clarified that productivity gain means increase in the number of chips per wafer. Since capacity of Samsung's C-die and D-die is the same, the increase in the number of dies equals the increase in the number of bits per wafer. Therefore, the key takeaway from the announcement is that the 1y nm technology and the new in-cell data sensing system enable Samsung to shrink die size and fit more DRAM dies on a single 300-mm wafer. Meanwhile, the overall 30% productivity gain results in lower per-die costs at the same yield and cycle time (this does not mean that the IC costs are 30% lower though) and increases DRAM bit output.

The in-cell data sensing system and air spacers will be used by Samsung in other upcoming types of DRAM, including DDR5, LPDDR5, High Bandwidth Memory 3.0, and GDDR6.

Also at Tom's Hardware.

Previously: Samsung Announces "10nm-Class" 8 Gb DRAM Chips

Related: Samsung Announces 12Gb LPDDR4 DRAM, Could Enable Smartphones With 6 GB of RAM
Samsung Announces 8 GB DRAM Package for Mobile Devices
Samsung's 10nm Chips in Mass Production, "6nm" on the Roadmap
Samsung Increases Production of 8 GB High Bandwidth Memory 2.0 Stacks
IC Insights Predicts Additional 40% Increase in DRAM Prices

Original Submission

DDR5-4400 Test Chip Demonstrated 16 comments

Cadence and Micron Demo DDR5-4400 IMC and Memory, Due in 2019

Cadence this week introduced the industry's first IP interface in silicon for the current provisional DDR5 specification developed by JEDEC. Cadence's IP and test chip [are] fabricated using TSMC's 7 nm process technology, and is designed to enable SoC developers to begin on their DDR5 memory subsystems now and get them to market in 2019-2020, depending on high-volume DDR5 availability. At a special event, Cadence teamed up with Micron to demonstrate their DDR5 DRAM subsystem. In the meantime, Micron has started to sample its preliminary DDR5 chips to interested parties.

Cadence's DDR5 memory controller and PHY achieve a 4400 MT/s data rate with CL42 using Micron's prototype 8 Gb DDR5 memory chips. Compared to DDR4 today, the supply voltage of DDR5 is dropped from 1.2 volts to 1.1 volts, with an allowable fluctuation range of only ±0.033 V. In this case, the specifications mean that an 8 Gb DDR5 DRAM chip can hit a considerably higher I/O speed than an 8 Gb commercial DDR4 IC today at a ~9% lower voltage. JEDEC plans that eventually the DDR5 interface will get to 6400 MT/s, but Cadence says that initial DDR5 memory ICs will support ~4400 MT/s data rates. This will be akin to DDR4 rising from DDR4-2133 at initial launch to DDR4-3200 today. Cadence's DDR5 demo video can be watched here.

Micron Accidentally Confirms GDDR6X Memory, and Nvidia's RTX 3090 GPU 21 comments

Micron Spills on GDDR6X: PAM4 Signaling For Higher Rates, Coming to NVIDIA's RTX 3090

It would seem that Micron this morning has accidentally spilled the beans on the future of graphics card memory technologies – and outed one of NVIDIA's next-generation RTX video cards in the process. In a technical brief that was posted to their website, dubbed "The Demand for Ultra-Bandwidth Solutions", Micron detailed their portfolio of high-bandwidth memory technologies and the market needs for them. Included in this brief was information on the previously-unannounced GDDR6X memory technology, as well as some information on what seems to be the first card to use it, NVIDIA's GeForce RTX 3090.

[...] At any rate, as this is a market overview rather than a technical deep dive, the details on GDDR6X are slim. The document links to another, still-unpublished document, "Doubling I/O Performance with PAM4: Micron Innovates GDDR6X to Accelerate Graphics Memory", that would presumably contain further details on GDDR6X. None the less, even this high-level overview gives us a basic idea of what Micron has in store for later this year.

The key innovation for GDDR6X appears to be that Micron is moving from using POD135 coding on the memory bus – a binary (two state) coding format – to four state coding in the form of Pulse-Amplitude Modulation 4 (PAM4). In short, Micron would be doubling the number of signal states in the GDDR6X memory bus, allowing it to transmit twice as much data per clock.

[...] According to Micron's brief, they're expecting to get GDDR6X to 21Gbps/pin, at least to start with. This is a far cry from doubling GDDR6's existing 16Gbps/pin rate, but it's also a data rate that would be grounded in the limitations of PAM4 and DRAM. PAM4 itself is easier to achieve than binary coding at the same total data rate, but having to accurately determine four states instead of two is conversely a harder task. So a smaller jump isn't too surprising.

The leaked Ampere-based RTX 3090 seems to be Nvidia's attempt to compete with AMD's upcoming RDNA2 ("Big Navi") GPUs without lowering the price of the usual high-end "Titan" GPU (Titan RTX launched at $2,499). Here are some of the latest leaks for the RTX 30 "Ampere" GPU lineup.

Also at Guru3D and Wccftech.

Previously: GDDR5X Standard Finalized by JEDEC
SK Hynix to Begin Shipping GDDR6 Memory in Early 2018
Samsung Announces Mass Production of GDDR6 SDRAM

Related: PCIe 6.0 Announced for 2021: Doubles Bandwidth Yet Again (uses PAM4)

Original Submission

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  • (Score: 2) by bob_super on Friday January 19 2018, @01:29AM (6 children)

    by bob_super (1357) on Friday January 19 2018, @01:29AM (#624506)

    Three questions:
    - Is the higher speed going to be supported by the CPU/GPU?
    - Is the cost low enough to offset the higher bandwidth of HBM2/+
    - Can Ethereum/XXXcoin fall low enough that we can actually buy a video card with it in the next decade?

    • (Score: 2) by takyon on Friday January 19 2018, @01:56AM (4 children)

      by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Friday January 19 2018, @01:56AM (#624509) Journal

      - GPUs use GDDR5X, which is already faster than GDDR5. They will support GDDR6.
      - The high bandwidth of HBM2/3 could be considered overkill for many GPU users. And the expense is real... it is more expensive when you want 4-8 GB in a single "stack".
      - Bitcoin is hurting right now. If other coins can be mined using ASICs or soemthing better than a GPU, then there will be less demand for GPUs.

      AMD was supposed to start including HBM on products like APUs, but Intel has beaten them to that with the Kaby Lake + AMD Vega + HBM combo chips.

      [SIG] 10/28/2017: Soylent Upgrade v14 []
    • (Score: 0) by Anonymous Coward on Friday January 19 2018, @05:33AM

      by Anonymous Coward on Friday January 19 2018, @05:33AM (#624584)

      For once, "here" (crappy country, but not totally crappy) we have stock of something USA lacks, instead of getting the left overs. Incredible. []

      Who wants RX580 cards for 400 euros plus shipping? Shops also have 570s and lower. Forgot to check what NVidias exactly (prefer Linux open source support, and no dick EULAs about what can or cannot be done with a card), tho 10xx rings a bell.

  • (Score: 5, Interesting) by martyb on Friday January 19 2018, @02:16AM (8 children)

    by martyb (76) Subscriber Badge on Friday January 19 2018, @02:16AM (#624518) Journal

    Back in the early-mid 1980's I was testing changes to IBM's VM operating system in support of their new 3090 mainframe. There were two prototypes in existence in the world... the biggest, fastest machines they had ever made. Ran so hot it was water cooled, too.

    On one occasion, I was testing paging support with a "paging spider". In essence it was an instruction to copy a chunk of memory which would be used to copy itself and then call the copy. The trick was that the initial instruction was specially located to straddle a 4KB page boundary. The destination was the boundary between the next two pages. This effectively touched every page in memory as quickly as possible. In short, copy an instruction that straddles the end of page (X) and the beginning of page (X+1) to a location that straddles the end of page (X+2) and the beginning of page (X+3). Then call the copied instruction. When you reach the end of memory, reset back to the beginning.

    I fired it up and watched it pick up speed as the buffers and OS stabilized. Slowly, but surely, I watched things go up until it exceeded the field size provided for displaying the activity: a 3-digit decimal number. Yup, I got it to 1000+ 4K pages per second. Could well have been the very first person in the world to see that data rate.

    That works out to... 4MB/sec. This new memory, slated for a graphics card, can do 72 GB/sec. That is ~18,000 times as much throughput.

    I wonder how many of today's developers have even an inkling of how far we've come?

    Wit is intellect, dancing.
    • (Score: 3, Informative) by takyon on Friday January 19 2018, @02:38AM (7 children)

      by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Friday January 19 2018, @02:38AM (#624528) Journal

      Since multiple dies are used, you actually end up with a much higher memory bandwidth than 72 GB/s, possibly up to 864 GB/s by Wccf's reckoning, which is in the ballpark of GPUs using HBM2. [] []

      HBM3 could probably enable a product with 4 TB/s memory bandwidth, a full million times faster than your old stuff.

      [SIG] 10/28/2017: Soylent Upgrade v14 []
      • (Score: 2) by martyb on Friday January 19 2018, @03:18AM (6 children)

        by martyb (76) Subscriber Badge on Friday January 19 2018, @03:18AM (#624543) Journal

        Since multiple dies are used, you actually end up with a much higher memory bandwidth than 72 GB/s, possibly up to 864 GB/s by Wccf's reckoning, which is in the ballpark of GPUs using HBM2.

        [...] HBM3 could probably enable a product with 4 TB/s memory bandwidth, a full million times faster than your old stuff.

        I'm... speechless. That just utterly and totally boggles my mind. I remember trying to squeeze out a couple more bytes from CONFIG.SYS and AUTOEXEC.BAT so I could get a program to fit into available memory under DOS 3.1 Now, systems with 16 GB of RAM are no big deal. (That mainframe I mentioned in the GP post? It had 32 MB of main memory and 256 MB of extended memory.) A Raspberry Pi has more memory than that... and it's probably much faster, too. All for the princely sum of... $35. And draws under 7(?) watts, peak load.

        Wit is intellect, dancing.
        • (Score: 3, Interesting) by takyon on Friday January 19 2018, @03:36AM

          by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Friday January 19 2018, @03:36AM (#624552) Journal

          I think we'll see some sort of new transistor that uses near-threshold voltages [] or exploits quantum effects []. We could get today's 200 Watt chips to shrink to below 1 Watt of power consumption for the same performance, and the massive reduction in heat will allow easy stacking, which will be expressed by massively increasing core counts (you better learn how to write multithreaded software before a bot does it for you). Meanwhile, HBM is already at 8-16 layers and NAND is around 96-128. Watch those increase to hundreds or tens of thousands of layers.

          The party isn't over yet.

          [SIG] 10/28/2017: Soylent Upgrade v14 []
        • (Score: 3, Insightful) by Azuma Hazuki on Friday January 19 2018, @03:42AM (3 children)

          by Azuma Hazuki (5086) on Friday January 19 2018, @03:42AM (#624558) Journal

          And yet, Windows still slows down, locks up, and barfs its dysenteric guts out on the regular on that 16GB home computer.

          I am "that girl" your mother warned you about...
          • (Score: 2) by takyon on Friday January 19 2018, @03:50AM (2 children)

            by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Friday January 19 2018, @03:50AM (#624561) Journal

            Swap HDD for SSD, remove pre-installed bloatware, disable unnecessary services [], and install ad/script blockers and even the Windows computer should be fine.

            In fact, RAM requirements [] have held pretty steady for Windows lately. 2 GB minimum for x64 and 4 GB recommended since Windows 7 in October 2009. 8 GB is probably more than enough for most.

            [SIG] 10/28/2017: Soylent Upgrade v14 []
            • (Score: 0) by Anonymous Coward on Friday January 19 2018, @12:49PM

              by Anonymous Coward on Friday January 19 2018, @12:49PM (#624661)

              i was going to say this advice is almost 10 years old, and you can write the same sentence and change the numbers if you go all the way back to dos with windows 3.1 running on it. just say 4mb is minimum 8mb recommend--16mb is great.

              64mb was overkill (me I had 24mb in that era, due to having two 16s and two 4s populating the ram slots--i upgraded and found i could use half of the previous memory without encountering what enthusiasts cried about as unmatched memory killing performance. i made the extra ram space into a ramdisk and... well multiply it all by 1024 and i still do the same things today)

            • (Score: 2) by Freeman on Friday January 19 2018, @04:08PM

              by Freeman (732) on Friday January 19 2018, @04:08PM (#624746) Journal

              I shouldn't need a Computer Degree to get a stable Windows environment. Though, I guess that's the price one pays for using MS?

              Joshua 1:9 "Be strong and of a good courage; be not afraid, neither be thou dismayed: for the Lord thy God is with thee"
        • (Score: 3, Informative) by Freeman on Friday January 19 2018, @04:05PM

          by Freeman (732) on Friday January 19 2018, @04:05PM (#624741) Journal

          Arduinos probably have more power than the average DOS 3.1 machine. Also, please note you can acquire a Rasperry Pi Zero for $5 + Shipping. That Raspberry Pi Zero is definitely more powerful than your average DOS 3.1 machine. There's also the Raspberry Pi Zero W that has wireless and bluetooth built-in for $10 + shipping. The Zero W shooting 1080p video with a Pi Camera Module draws approximately 1.1W. I used to hold on to old hardware, because what if I wanted to try XYZ thing. I don't do that anymore, because the power savings alone are worth using something different. Also, DOSBox or FreeDOS will almost certainly be good enough. I do have an old Thinkpad A21m that's still kicking it, though. I put Lubuntu on that thing and it's pretty nice. Though, it's most assuredly out of date.

          Joshua 1:9 "Be strong and of a good courage; be not afraid, neither be thou dismayed: for the Lord thy God is with thee"