Submitted via IRC for takyon
Wave Computing today announced that it has acquired MIPS Tech, Inc. (formerly MIPS Technologies), a global leader in RISC processor Intellectual Property (IP) and licensable CPU cores. The acquisition will accelerate Wave's strategy of offering AI acceleration from the Datacenter to the Edge of Cloud by extending the company's products beyond AI systems to now also include AI-enabled embedded solutions.
[...] For example, Datacenter-centric AI applications today need many weeks to train using coprocessors such as GPUs, only to require a different architecture for inferencing at the Edge. The lack of a common AI platform, from Datacenter to Edge, slows market growth and reduces productivity of data scientists in fields such as autonomously driven vehicles, IoT sensors and more.
[...] "Wave's integration of two industry-leading compute architectures in a single data plane/control plane solution – Dataflow and Von Neumann – will be truly unique and an industry-first. It will fuel new, ground-breaking innovations in AI and other fields."
Source: Wave Computing Acquires MIPS Technologies
Related: Imagination Technologies Acquired for $675 Million, MIPS to be Sold Off
Wave Computing and Others Adopt 64-Bit MIPS Cores
Related Stories
The company that failed to acquire Lattice Semiconductor will acquire Imagination Technologies instead:
Imagination Technologies Group Plc agreed to be acquired by China-backed private equity firm Canyon Bridge Capital Partners.
Canyon Bridge said it will pay 182 pence a share in cash, or more than 500 million pounds ($675 million), for the U.K. designer of graphics chips. That's 42 percent more than Imagination's closing share price on Friday.
As part of the deal, Imagination will sell its U.S.-based embedded processor unit MIPS to Tallwood MIPS, a company indirectly owned by California-based investment firm Tallwood Venture Capital, Canyon Bridge said.
Canyon Bridge was keen to structure a bid to avoid scrutiny from U.S. regulators, Bloomberg reported earlier this month.
Earlier in September President Donald Trump rejected a takeover by Canyon Bridge of U.S. chipmaker Lattice Semiconductor Corp., just the fourth time in a quarter century that a U.S. president has ordered a foreign sale of an American firm stopped for security reasons.
Also at The Verge, AnandTech, and Financial Times.
Previously:
Related:
- Imagination Technologies Group Up for Sale
- Imagination Technologies will Continue to Make GPUs after Losing its Biggest Customer
Wave Computing Adopts Low Power MIPS 64-bit Multi-Threaded Core
Wave Computing [...] announced today that it has selected a 64-bit Multi-Threaded processor core from MIPS Technologies for future AI solutions. Wave will use the MIPS core in its next generation of Dataflow Processing Unit (DPU) chips that will ship in Wave's future deep learning systems to handle device control functions including management of the real-time operating system (RTOS) and system-on-chip (SoC) subsystem.
As design complexity and software footprints continue to increase, the 64-bit MIPS architecture is being used in an even broader set of datacenter, connected consumer devices, networking products, and emerging AI applications. In addition to Wave, companies including Mobileye, Fungible, ThinCI, and DENSO, among others, are using the MIPS 64-bit processor core as they develop ground-breaking AI applications. [...] Last August, Denso group company NSITEXE, Inc. announced that it licensed the newest MIPS CPU to drive enhanced in-vehicle electronic processing.
Related: MIPS Strikes Back: 64-bit Warrior I6400 Arrives
PEZY's Next Many-Core Chip Will Include a MIPS 64-Bit CPU
ARM Cortex-A35, Snapdragon 820, and New Imagination MIPS Processors
Linux-Based, MIPS-Powered Russian All-in-One PC Launched
Imagination Technologies Acquired for $675 Million, MIPS to be Sold Off
Imagination Technologies to design RISC-V cores:
Now better known for its PowerVR embedded GPUs, Imagination Technologies tried to enter the CPU market by purchasing MIPS Technologies and introducing microAptiv, interAptiv, and proAptiv cores in 2012.
It did not end up well, as the company had to sell its MIPS technology a few years later, and the MIPS architecture is now barely supported. But Imagination is now working on getting back into the CPU space by designing RISC-V cores.
[...] a May 2021 report by the Financial Times claims Imagination expects to invest up to $150m over the next two years to target a fresh push into the processor design market, specifically citing the RISC-V architecture.
Also at Tom's Hardware.
See also: QEMU 6.1 Released With RISC-V Improvements, AMD Emulation Fixes
Related: Imagination Technologies Acquired for $675 Million, MIPS to be Sold Off
Wave Computing Acquires MIPS Technologies
Imagination Announces B-Series GPU IP: Scaling up with Multi-GPU
(Score: 2) by Alfred on Thursday June 21 2018, @03:00PM
(Score: 2) by ledow on Thursday June 21 2018, @03:16PM (5 children)
Is it just me that's still waiting for the OLD ground-breaking innovations in AI promised?
(Score: 2) by takyon on Thursday June 21 2018, @03:20PM (1 child)
Like beating a human at checkers?
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 2) by julian on Thursday June 21 2018, @04:59PM
Checkers (draughts) was "solved" back in 2007. It was proved that with perfect play (by both players) the game will always result in a draw.
(Score: 2) by LoRdTAW on Thursday June 21 2018, @03:31PM
you mean actual intelligence and not if/case statements and graph databases?
(Score: 2) by c0lo on Thursday June 21 2018, @04:05PM
A bubble-burst more likely.
But at least the NNs would have been explored thoroughly.
https://www.youtube.com/watch?v=aoFiw2jMy-0
(Score: 2) by DannyB on Thursday June 21 2018, @06:47PM
Flying cars?
If you think a fertilized egg is a child but an immigrant child is not, please don't pretend your concerns are religious
(Score: 2) by LoRdTAW on Thursday June 21 2018, @03:34PM (8 children)
MIPS is an interesting architecture but its day has long past. I'd rather focus on open designs like risc-v and let mips fade into history. Unless they want to completely open source the design, then i'll take two please.
(Score: 4, Interesting) by Snotnose on Thursday June 21 2018, @04:01PM (6 children)
Back in 2000 or so if you wanted your CPU to get the Microsoft stamp of approval it had to pass a suite of tests. I got to validate a MIPS. 1 test was to ensure all 4 gig of memory was accessible. The MIPS memory architecture dedicated something like 512 meg to I/O and you couldn't put memory on it. There was a procedure for getting exceptions, which I tried to follow. The guy at Microsoft I was put in contact with basically didn't want to hear it. His attitude was "if it can't address the entire 32 bit memory space then it fails".
Finally got it to pass, but my opinion of Microsoft dropped another several points on that project.
As for the MIPS, it was just another architecture. Back then they were as prevalent as frameworks are today.
Relationship status: Available for curbside pickup.
(Score: 2) by RS3 on Thursday June 21 2018, @04:41PM (2 children)
But but but: Intel, 1st meg RAM space, interrupt vectors, mapped graphics RAM, real-mode, bla bla bla?
As I recall, many processors use memory-mapped I/O, certainly Motorola 68000, probably "Power", DEC Alpha, ...
(Score: 3, Informative) by Snotnose on Thursday June 21 2018, @07:05PM (1 child)
The Intel processors of the day could address the full 32 bit address space, they had a pin that told the hardware you were doing an I/O on that address. Interrupt vectors were just memory, during boot up you had to stuff the correct addresses into the table. Same with graphics, shared memory.
What made the MIPS different was there was no memory vs I/O pin, if you talked to an address in a certain range it was I/O.
Relationship status: Available for curbside pickup.
(Score: 2) by LoRdTAW on Thursday June 21 2018, @09:18PM
I don't remember but wasn't the I/O space limited to 8 bits on the 8086/88? Not sure if it grew beyond that in subsequent versions of the arch e.g. 286/386/etc.
(Score: 2) by DannyB on Thursday June 21 2018, @06:50PM (2 children)
One of Microsoft's tests should have been to exclude microprocessors that have segment registers.
But I blame the IBM PC for that. When the PC was designed, better processors were available. But IBM had to make sure to select the worst possible choice.
It's only buckets of monopoly money that took such a botched design so far. (that sentence applies equally to Intel and Microsoft.)
If you think a fertilized egg is a child but an immigrant child is not, please don't pretend your concerns are religious
(Score: 4, Interesting) by Snotnose on Thursday June 21 2018, @07:01PM (1 child)
The certification was for their embedded OS Window Consumer Edition, aptly named WinCE. It was meant for real time systems but would not guarantee latency, max memory usage, max stack, interrupt response time, nor pretty much any other requirement for a real time OS you can think of.
WinCE was a steaming pile of garbage, and the test required for your CPU to be certified for it wasn't much better.
Relationship status: Available for curbside pickup.
(Score: 2) by LoRdTAW on Thursday June 21 2018, @09:21PM
But muh visual studio bruh.
(Score: 0) by Anonymous Coward on Thursday June 21 2018, @04:34PM
exactly.