Submitted via IRC for takyon
Ampere is launching two versions of its first ARM-based 64-bit server processor today in a challenge to Intel's dominance of data center chips.
Intel dominates about 99 percent of the server chip market with its x86-based processors, but Ampere is targeting power-efficient, high-performance, and high-memory capacity features with its Ampere eMAG processors for data centers.
Renee James, former president of Intel and CEO of Ampere, said in an interview with VentureBeat that customers can now order the chip from the company's website. The chips are aimed at hyperscale cloud and edge computing, using the ARMv8-A cores. The chips target big data and in-memory databases.
[...] Based on the SPECint benchmark performance, Ampere's eMAG processor can deliver about twice the performance of the Intel Xeon Gold 6130 processor at about the same price, the company said. The eMAG with 32 cores and 3.3 Ghz in performance will sell for $850, and with 16 cores at 3.3 GHz will sell for $550.
[...] Ampere designed its cores, which feature eight DDR4-2667 memory controllers, 42 lanes of PCIe 3.0 for high bandwidth I/O, 125W TDP for maximum power efficiency, and a 16-nanometer FinFET manufacturing process at contract manufacturer TSMC.
Previously: Former Intel President Launches New Chip Company With Backing From Carlyle Group
Related Stories
Submitted via IRC for TheMightyBuzzard
Ampere, a new chip company run by former Intel president Renee James, came out of stealth today with a brand-new highly efficient Arm-based server chip targeted at hyperscale data centers.
The company's first chip is a custom core Armv8-A 64-bit server operating at up to 3.3 GHz with 1TB of memory at a power envelope of 125 watts. Although James was not ready to share pricing, she promised that the chip would offer unsurpassed price/performance that would exceed any high performance computing chip out there.
The company has a couple of other products in the works as well, which it will unveil in the future.
Source: TechCrunch
Update: Nvidia VP Says Next-Gen GPUs Will Be Made by TSMC and Samsung
Previous reports that Samsung would produce Nvidia's upcoming Ampere GPUs were incorrect.
Nvidia's Ampere not to be confused with the other Ampere.
Previously: Samsung Undercuts TSMC, to Fab Nvidia Ampere on Its 7nm Process - Report
Marvell Announces ThunderX3: 96 Cores & 384 Thread 3rd Gen Arm Server Processor
The Arm server ecosystem is well alive and thriving, finally getting into serious motion after several years of false-start attempts. Among the original pioneers in this space was Cavium, which went on to be acquired by Marvell in 2018. Among the company's server CPU products is the ThunderX line; while the first generation ThunderX left quite a lot to be desired, the ThunderX2 was the first Arm server silicon that we deemed viable and competitive against Intel and AMD products. Since then, the ecosystem has accelerated quite a lot, and only last week we saw how impressive the new Amazon Graviton2 with the N1 chips ended up. Marvell didn't stop at the ThunderX2, and had big ambitions for its newly acquired CPU division, and today is announcing the new ThunderX3.
The ThunderX3 is a continuation and successor to then-Cavium's custom microarchitecture found in the TX2, adopting a lot of the key characteristics, most notably the capability of 4-way SMT. Adopting a new microarchitecture with higher IPC capabilities, the new TX3 also ups the clock frequencies, and now hosts up to a whopping 96 CPU cores, allowing the chip to scale up to 384 threads in a single socket.
Related: Marvell Technology to Buy Cavium for $6 Billion
ARM "Project Trillium", Cambricon MLU-100, and Cavium ThunderX2
HPE Delivers World's Largest Arm Supercomputer for U.S. Department of Energy
Ampere Launches its First ARM-Based Server Processors in Challenge to Intel
Amazon Announces 64-core Graviton2 Arm CPU
80-Core Arm CPU To Bring Lower Power, Higher Density To A Rack Near You
Ampere's Product List: 80 Cores, up to 3.3 GHz at 250 W; 128 Core in Q4
The Ampere Altra range, as part of today's release, will offer parts from 32 cores up to 80 cores, up to 3.3 GHz, with a variety of TDPs up to 250 W. As we've described in our previous news items on the chip, this is an Arm v8.2 core with a few 8.3+8.5 features, offers support for FP16 and INT8, supports 8 channels of DDR4-3200 ECC at 2 DIMMs per channel, and up to 4 TiB of memory per socket in a 1P or 2P configuration. Each CPU will offer 128 PCIe 4.0 lanes, 32 of which can be used for socket-to-socket communications implemented with the CCIX protocol over PCIe. This means 50 GB/s in each direction, and 192 PCIe 4.0 lanes in a dual socket system for add-in cards. Each of the PCIe lanes can bifurcate down to x2.
[...] Previously Ampere had stated they were going for 80 cores at 3.0 GHz at 210 W, however the Q80-33 is pushing that frequency another 300 MHz for another 40 W, and we understand that the tapeout of silicon from TSMC performed better than expected, hence this new top processor.
[...] If that wasn't enough, Ampere dropped a sizeable nugget into our pre-announcement briefing. The company is set to launch a 128-core version of Altra later this year.
This will be a new silicon design, beyond Ampere's initial layout of 80 cores for Altra, however Ampere states that while they are using the same platform as the regular Altra, they have done extensive tweaking and optimizations within the mesh interconnect for Altra Max to hide the additional contention that might occur when using the same main memory speeds.
Altra Max will be socket and pin-compatible with Altra, also support dual socket deployments, and Ampere states that the silicon will be ready for early sampling with partners in Q4, and is looking to move into high volume in mid-2021.
Previously: Ampere Launches its First ARM-Based Server Processors in Challenge to Intel
80-Core Arm CPU To Bring Lower Power, Higher Density To A Rack Near You
Related: Amazon Announces 64-core Graviton2 Arm CPU
Marvell Announces ThunderX3, an ARM Server CPU With 96 Cores, 384 Threads
AMD and Intel Have a Formidable New Foe (Amazon)
(Score: 3, Informative) by MichaelDavidCrawford on Friday September 21 2018, @05:56AM (5 children)
Something like video processing.
Oh, sorry that's actually unimaginable, because no one is willing to go to the trouble to learn how to write concurrent code.
There are other ways than multithreading, for example Apple's Open Source Grand Central Dispatch [apple.com]. I expect it has the Apple Public Source License version 2.
Yes I Have No Bananas. [gofundme.com]
(Score: -1, Spam) by Anonymous Coward on Friday September 21 2018, @06:24AM
The man's - Yuipson's - eyes opened wide in shock. That was too fast. Sure, he knew how fragile these were, but still, that was much too fast. Frustrated, Yuipson grabbed the next one and began angrily pumping. This process of moving from one to the next was known as 'The Shuffling'. And shuffle he did.
The little girl's head slammed against the wall as Yuipson aggressively violated her from behind. What's more, the large man was slamming her back with one of his fists. It really couldn't be helped: the other little girl had died all too quickly from a mere slashed throat, angering the man profusely. From there, it didn't take long for the man's anger to reach catastrophic levels; once that happened, it certainly did not take long for the brutalized little girl to slump to the ground lifelessly.
"Damnit!" Yuipson screeched. They just didn't make these things like they used to! So, he shuffled to the next one. Then, the next one. And then the next one. And then the next one. The Shuffling continued until all that remained in the room were Yuipson and a pile of lifeless puppets that just so happened to resemble children. Righteous fury indeed.
At this scene, Yuipson boldly declared, "The Shuffling will continue!" Yes, although his supply had run out, he need only acquire more...
(Score: 2) by requerdanos on Friday September 21 2018, @01:05PM
The only* desktop application I recall using a high percentage of all my cores/threads is handbrake, working through a queue. Even so, it's a great example of desktop software that does indeed chew up all cores encoding video.
Anything else insanely compute-intensive that uses many cores/threads seems to be of the start-from-a-prompt variety, such as compiling something nontrivial with the -j switch requesting the use of a particular number of threads.
Or, the classic way, starting heavy single-threaded things from a prompt, and juggling them for max CPU utilization.
Something tells me, though, that if their target is "hyperscale cloud** and edge computing" then the individual processes that combine to tax the CPU are going to be VMs, which are hardly desktop applications.
I sometimes wonder what will become mature first, multithreaded code practices, or quantum computing algorithms.
If clustering ever gets solved, by the way, then that will probably solve the multithreading thing as well because you could cluster more processes to the extra threads similar to clustering processes on different machines.
-----
* Other than mining. Any *-coin software that features CPU mining can pretty much melt a CPU to glass and slag by design.
** There is no "cloud" [fsfe.org]--just other people's computers. Even if there are people who deny that [zdnet.com] because it offends their worldview.
(Score: 4, Insightful) by DannyB on Friday September 21 2018, @02:43PM
I've seen that future coming for over ten years and have been preparing for it. I've even advocated for that approach here on SN.
I happen to (mostly) work in Java. The first significant current code I dabbled with was in Clojure (on the JVM). Clojure has a great concurrency story.
Next I used some of the new Java frameworks which make it easy to use worker pools and fork/join. For certain operations I can see substantial improvements in performance as well as getting all the cores to light up. Just as with anything that needs to perform well, you allocate all your structures up front, then run your performance critical code which (ideally) should not generate any garbage. This same lesson would apply to other GC languages.
Your JVM code hits three performance stages as it "warms up":
1. interpreted bytecode until the dynamic profiler notices it is using all the CPU
2. compiled to native by the C1 compiler (fast compiler generates simiple native code)
3. the previous step, queued your code to get shortly recompiled by the C2 compiler (slow compiler generates highly optimized native code)
The native code from C2 is targeted at your specific hardware, eg, whatever microprocessor you have, it's instruction set extensions, etc. Things an ahead-of-time compiler cannot do and be cross-platform to all processors.
The lower I set my standards the more accomplishments I have.
(Score: 2) by The Mighty Buzzard on Friday September 21 2018, @04:49PM (1 child)
Gentoo. Nuff said.
My rights don't end where your fear begins.
(Score: 0) by Anonymous Coward on Friday September 21 2018, @06:49PM
Exherbo!
(Score: 1, Interesting) by Anonymous Coward on Friday September 21 2018, @07:33AM (2 children)
I can believe all the POWER, SPARC and big iron left on the 'net amount to less than one percent, but AMD can't even pull a single percentage point? Damn, don't even know how bad things really are.
(Score: 3, Informative) by takyon on Friday September 21 2018, @09:39AM (1 child)
I thought AMD was doing a lot better with Epyc. I guess Intel execs are sipping scotch right now.
Intel CEO Bracing For EPYC Impact, Aims to Keep AMD Under 20% of Server Market Share [tomshardware.com]
Hmm, there's something fishy about this graph charting AMD's push into Intel's server turf [theregister.co.uk]
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 2) by bobthecimmerian on Friday September 21 2018, @11:13AM
I suspect Intel is still worried. Even if AMD only gets 2% of the server market by the end of the year vs 0.5% a few years ago, it starts to force Intel away from "price our server processors any way we want".
(Score: 3, Funny) by turgid on Friday September 21 2018, @09:19AM (5 children)
With itanium.
I refuse to engage in a battle of wits with an unarmed opponent [wikipedia.org].
(Score: 3, Informative) by RamiK on Friday September 21 2018, @12:52PM
Necromancy, ha? Wait, wasn't Bob Rau cremated as a Hindu?
*grabs shovel*
More seriously, I think they were sampling Microsoft's E2 EDGE processors in a partnership not too unlike from how Intel and HP worked on the Itanium but something went off schedule. Regardless, hopefully this time they won't have their chief architect for both the ISA and the compiler pass away only a couple of years after putting out the introductory paper ( http://www.cs.binghamton.edu/~dima/cs522_05/epic.pdf [binghamton.edu] ).
compiling...
(Score: 3, Informative) by requerdanos on Friday September 21 2018, @01:19PM (2 children)
Ha ha, good one. But to be fair, Itanium was honestly "just another bad idea by HP" that they convinced intel go along with. (https://www.cnet.com/news/itanium-a-cautionary-tale/ [cnet.com])
(Score: 2) by hendrikboom on Friday September 21 2018, @04:36PM (1 child)
That site has a loud, obnoxious ad.
(Score: 2) by requerdanos on Friday September 21 2018, @05:17PM
My apologies. I didn't see it probably because some level of adblocking caught it before I saw it.
I should pay better attention.
(Score: 3, Informative) by DannyB on Friday September 21 2018, @02:44PM
Itanic.
The lower I set my standards the more accomplishments I have.
(Score: 2) by hendrikboom on Friday September 21 2018, @01:20PM (1 child)
And how are these processors going to rate on the simplicity/vulnerability trade-off?
Are they going to fall for the speculative-execution information leaks?
-- hendrik
(Score: 3, Insightful) by DannyB on Friday September 21 2018, @02:45PM
Are these processors going to have "Intel management engines" to spy on your and ensure you don't actually own your hardware?
The lower I set my standards the more accomplishments I have.
(Score: 2) by requerdanos on Friday September 21 2018, @01:34PM (2 children)
Venturebeat, being a business-source and not a tech-source, seems to be pretty accepting of Ampere's claims, though to be fair, I suppose there's no reason not to be.
Is there some reason that 125W TDP yields maximum efficiency? In what way(s) is 125W better than 95W, or 140W, say, in efficiency? Just curious.
That 6130 seems a rather soft target. It isn't anywhere near the top of its line at 16 cores/2.1GHz, and its MSRP is a hefty $1979. For comparison, consider a lowly 8-core Ryzen R7: This Xeon overall benchmarks barely 20% better despite costing six times as much as the $320 Ryzen, and its single-thread performance is actually worse.
Some questions...
--------
* Ryzen R7 2700X vs. Xeon Gold 6130 specs and benchmarks: https://www.cpubenchmark.net/compare/Intel-Xeon-Gold-6130-vs-AMD-Ryzen-7-2700X/3126vs3238 [cpubenchmark.net]
(Score: 2) by hendrikboom on Friday September 21 2018, @05:06PM (1 child)
Even if they cost more and have lower performance, it may still be worth buying them if they are more secure, without backdoors or overengineered complexity,
But are they more secure?
-- hendrik
(Score: 2) by requerdanos on Friday September 21 2018, @05:24PM
Well, if the Emag is 100% faster ("twice the performance") than a mid-level Xeon that itself is about 20% faster than a Ryzen, for between $500 and $800, then it's going to be quite the speed demon (about 240% as fast as the Ryzen).
As you say, the security issues will be interesting. My guess would be spectre/meltdown vulnerability "yes" but ameliorated by software patches, forced management engine "no". But my guess has very little value here.