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posted by martyb on Wednesday November 21 2018, @07:35PM   Printer-friendly
from the What-*does*-FPGA-stand-for? dept.

As part of the company's Supercomputing 2018, a new FPGA accelerator card was announced by Xilinx. The Xilinx Alveo U280 is one of the company's pre-ACAP 16nm UltraScale+ architecture FPGA products. The U280 features 8GB of Samsung High Bandwidth Memory (HBM2) plus 32GB of DDR4 memory. The goal of the new card is to accelerate database search and analytics, machine learning inference, and other memory-bound applications.

Buried in the documentation for the card is a nugget of extremely interesting information:

"The U280 acceleration card includes CCIX support to leverage existing server interconnect infrastructure for high bandwidth, low latency cache coherent shared memory access with CCIX enabled processors including Arm and AMD." (Source: Xilinx Alveo U280 whitepaper WP50 (v1.0) accessed 16 November 2018)

We were recently at the AMD Next Horizon Event and STH friend Dr. Ian Dr. Ian Cutress at Anandtech (not a typo, that is what his SC18 badge said) touched upon this in his interview with AMD CTO Mark Papermaster. Neither in the Rome disclosure nor the interview did AMD confirm CCIX support. However, AMD publicly supports CCIX and Gen-Z and when we asked if this means Rome supports CCIX all we received was that AMD supports CCIX but has not announced a product with it yet. Arm may have chips derived from its IP with CCIX support, but AMD has a more well-defined roadmap.

https://www.servethehome.com/xilinx-alveo-u280-launched-possibly-with-amd-epyc-ccix-support/


Original Submission

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AMD Is Gearing up To Acquire Xilinx (XLNX) for $30 Billion

AMD, a major player in the semiconductor sphere, is gearing up to acquire Xilinx for $30 billion, thereby, providing an impetus to the ongoing consolidation wave in the industry.

According to the sources quoted by [The] Wall Street Journal, AMD and Xilinx are currently in an advanced stage of negotiation, with a potential deal emerging as early as next week.

Bear in mind that Xilinx manufactures programmable chips for wireless networks and its acquisition will provide AMD a solid foothold in an industry that is currently in flux. With carriers injecting billions of dollars in the telecommunication sphere in order to expand the coverage of the next-gen 5G wireless network, Xilinx has become an important node in this endeavor.

However, the deal may be rejected:

The details of the deal revealed yesterday suggest that AMD is interested in paying up to $20 billion for acquiring Xilinx. This marks a roughly 20% premium over the acquisition target's closing share price yesterday. Xilinx is responsible for manufacturing communications and processing products, and it specializes in semiconductors dubbed as field-programmable gate arrays (FPGAs). These differ from application-specific integrated circuits (ASICs, such as a microprocessor) by allowing use-customization after manufacturing.

Following the revelation, analysts from Citi Group, Wedbush, Citigroup and CNBC have pitched in their opinions about the affair. The majority of the analysts are skeptical of the deal's outcome as they either believe that no synergies exist between AMD and Xilinx, or that Xilinx management will likely reject the deal.

The Radeon designer's primary objective behind the move is likely to be the intention of competing with Intel Corporation in the FPGA sector. Due to the nature of FPGAs, they are often found in a large array of tech products. Such products cover applications such as neural networks, aerospace, automotive, finance, data centers and wireless and wired communications.

Also at Phoronix.

Related: Xilinx 7nm FPGA SoC
Xilinx Alveo U280 Launched, Possibly with AMD EPYC CCIX Support


Original Submission

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  • (Score: 0) by Anonymous Coward on Wednesday November 21 2018, @08:24PM (1 child)

    by Anonymous Coward on Wednesday November 21 2018, @08:24PM (#764932)

    CCIX is a high-performance, chip-to-chip interconnect architecture that provides a cache coherent framework for heterogeneous system architectures. Cache coherency is automatically maintained at all time between the central processing unit and the various other accelerators in the system. Operating over standard PCIe, CCIX supports signaling rates between 16 GT/s and 25 GT/s per link with support for port aggregation for higher performance.

    https://en.wikichip.org/wiki/ccix [wikichip.org]

    • (Score: 0) by Anonymous Coward on Thursday November 22 2018, @02:59PM

      by Anonymous Coward on Thursday November 22 2018, @02:59PM (#765209)

      thanks for editing the web to point to wikipedia ^_^

  • (Score: 0) by Anonymous Coward on Wednesday November 21 2018, @08:50PM

    by Anonymous Coward on Wednesday November 21 2018, @08:50PM (#764945)

    So it sounds like the plan is to replace Intel CPU + Nvidia GPU with AMD CPU + Xlinix FPGA in the machine learning server space. I wonder what this means for AMD's open source answer to CUDA, ROCm? Do they still plan on competing GPU-wise with Nvidia?

  • (Score: 1) by schusselig on Thursday November 22 2018, @08:08AM (1 child)

    by schusselig (6771) on Thursday November 22 2018, @08:08AM (#765093)

    > What-*does*-FPGA-stand-for? dept.

    Field Programmable Gate Array [wikipedia.org] which is basically like an ASIC that can be fiddled with after manufacturing.

    • (Score: 0) by Anonymous Coward on Thursday November 22 2018, @03:02PM

      by Anonymous Coward on Thursday November 22 2018, @03:02PM (#765210)

      i suppose that's what is needed for the regular A.I. to gain consciousness?

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