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posted by Fnord666 on Sunday August 23 2020, @02:47AM   Printer-friendly

DARPA 3DSoC CNFET project moves towards commercialisation phase

Skywater, the US government trusted fab partner, and MIT have announced that the DARPA Three Dimensional Monolithic System-on-a-Chip (3DSoC) programme, has entered its second phase.

After completing the program's initial phase, focused on transferring the Carbon Nanotube Field Effect Transistor (CNFET)-based 3DSoC technology into SkyWater's 200 mm production facility, phase two will focus on refining manufacturing quality, yield, performance, and density – key elements of commercial viability.

[...] A 3DSoC program update will be presented by MIT professor, Dr. Max Shulaker at the virtual 2020 DARPA Electronics Resurgence Initiative (ERI) Summit on August 20th.

Arm Announces Three Year Partnership With DARPA Aimed At Maintaining U.S. Chip Design Lead

In a development that falls in line with recent U.S. efforts to bring semiconductor manufacturing inside its shores, British chip design house Arm announced yesterday that it has entered into a three-year partnership agreement with the Defence Advanced Research Projects Agency (DARPA). The announcement came as the agency wrapped off an event related to its Electronic Resurgence Initiative (ERI), which is focused on reducing reliance on internationally fabricated semiconductors.

Under the partnership, all of Arm's commercial chip design architectures and intellectual property will be available for use on DARPA projects. The duo will also collaborate on efforts such as sensors that rely on low power use for constant monitoring. At the ERI Summit yesterday, Arm's chief executive officer Simon Segars focused his discussion on devices that fall under the ambit of the Internet of Things (IoT), and the connection of these devices with next-generation 5G networks.

Previously: DARPA's 3DSoC Becoming a Reality

Related: Washington in Talks with Chipmakers about Building U.S. Factories


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DARPA's 3DSoC Becoming a Reality 8 comments

First 3D Nanotube and RRAM ICs Come Out of Foundry

Here's something you don't see very often at government-sponsored technology meetings—spontaneous applause. It happened at DARPA's Electronics Resurgence Initiative Summit this week when MIT assistant professor Max Shulaker held up a silicon wafer that is the first step in proving DARPA's plan to turn a trailing edge foundry into something that can produce chips that can compete—even in a limited sense—with the world's leading edge foundries.

"This wafer was made just last Friday... and it's the first monolithic 3D IC ever fabricated within a foundry," he told the crowd of several hundred engineers Tuesday in Detroit. On the wafer were multiple chips made of a layer of CMOS carbon nanotube transistors and a layer of RRAM memory cells built atop one another and linked together vertically with a dense array of connectors called vias. The idea behind the DARPA-funded project, called 3DSoC, is that chips made with multiple layers of both would have a 50-fold performance advantage over today's 7-nanometer chips. That's especially ambitious given that the lithographic process the new chips are based on (the 90-nanometer node) was last cutting-edge back in 2004.

The project is only about a year old, but by the end of its 3.5-year run, DARPA wants a foundry technology that makes chips with 50-million logic gates, 4 gigabytes of nonvolatile memory, and 9 million interconnects per square millimeter between the layers that can transmit 50 terabits per second while consuming less than 2 picojoules per bit.

What Shulaker showed on Tuesday can't do all that yet, of course. But it's a key milestone in that journey. Together with SkyWater Technology Foundry and other partners "we've completely reinvented how we manufacture this technology, transforming it from a technology that only worked in our academic labs to a technology that can and is already today working inside a commercial fabrication facility within a U.S. foundry," he said.

Here's the paper I've linked a dozen times in the last year.


Original Submission

Washington in Talks with Chipmakers about Building U.S. Factories 51 comments

Washington in talks with chipmakers about building U.S. factories:

(Reuters) - The Trump administration is in talks with semiconductor companies about building chip factories in the United States, representatives from two chipmakers said on Sunday.

Intel Corp (INTC.O) is in discussions with the United States Department of Defense over improving domestic sources for microelectronics and related technology, Intel spokesman William Moss said in an emailed statement.

"Intel is well positioned to work with the U.S. government to operate a U.S.-owned commercial foundry and supply a broad range of secure microelectronics", the statement added.

Taiwan Semiconductor Manufacturing Co (TSMC) (2330.TW), on the other hand, has been in talks with the U.S. Department of Commerce about building a U.S. factory but said it has not made a final decision yet.

"We are actively evaluating all the suitable locations, including in the U.S., but there is no concrete plan yet", TSMC spokeswoman Nina Kao said in a statement.

[...] The Trump administration's discussions with chipmakers were reported earlier by the Wall Street Journal, with the report adding that TSMC also has been talking with Apple Inc (AAPL.O), one of its largest customers, about building a chip factory in the United States.

[...] The Journal had also reported that U.S. officials are looking at helping South Korea's Samsung Electronics Co (005930.KS), which has a chip factory in Austin, Texas, to expand its contract-manufacturing operations in the United States.

The U.S. Commerce Department, Samsung and Apple did not respond to requests for comment on Sunday.


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  • (Score: 2) by gtomorrow on Sunday August 23 2020, @04:21AM (5 children)

    by gtomorrow (2230) on Sunday August 23 2020, @04:21AM (#1040664)

    The announcement came as the agency wrapped off an event

    Forgive my ignorance but what is that idiom, "wrapped off," supposed to mean? "Wrapped up", ok: finished. "Wrapped off:" ???

    • (Score: 2) by takyon on Sunday August 23 2020, @04:28AM (2 children)

      by takyon (881) <takyonNO@SPAMsoylentnews.org> on Sunday August 23 2020, @04:28AM (#1040666) Journal

      They wrapped off the Zoom call, probably.

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      [SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
      • (Score: 2) by gtomorrow on Sunday August 23 2020, @07:11AM (1 child)

        by gtomorrow (2230) on Sunday August 23 2020, @07:11AM (#1040697)

        Wrapped off = signed off/hung up/closed communication?

        "Wrapped off"...I just can't wrap my head around that this morning. Sounds like a euphemism for masturbation. Maybe it's just bad writing.

        • (Score: 2) by Freeman on Monday August 24 2020, @03:09PM

          by Freeman (732) on Monday August 24 2020, @03:09PM (#1041148) Journal

          English borks all things.

          --
          Joshua 1:9 "Be strong and of a good courage; be not afraid, neither be thou dismayed: for the Lord thy God is with thee"
    • (Score: 0, Troll) by Fuck You Niggers on Sunday August 23 2020, @07:56AM (1 child)

      by Fuck You Niggers (12375) on Sunday August 23 2020, @07:56AM (#1040707)

      Holy fuck you're stupid. You should be ashamed for posting something that retarded. Go fuck yourself, nigger!

      • (Score: 2) by gtomorrow on Sunday August 23 2020, @12:50PM

        by gtomorrow (2230) on Sunday August 23 2020, @12:50PM (#1040768)

        Aww, sweetheart...are you crabby-wabby because your "private parts" just didn't get enough attention from daddy today?...or vice versa?

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