AMD patents a task transition method between BIG and LITTLE processors
The next decade will no longer be dictated by the number of cores, but rather the processor's fabrication node, packaging method, and power efficiency. A big role will also be played by heterogeneous architectures.
Later this year Intel will launch its 12th Gen Core Alder Lake processors for desktop and mobile systems. This is not the first architecture to implement Intel's Hybrid Technology (the first was Lakefield). This is a marketing term for high-efficiency (small) and high-performance (big) core implementation. Most tech users should be more familiar with the term big.LITTLE, which is actually an old name for ARM's heterogeneous computing architecture, now replaced by DynamIQ.
While heterogeneous CPUs have been used in mobile devices for years, this technology isn't exactly a domain of modern desktop PCs, where power efficiency is not exactly the biggest concern. The next-generation Windows operating system is rumored to feature a new task scheduling method for such heterogeneous computing, which might just align with Intel's Alder Lake launch.
While AMD has not really confirmed it is working on such [a] processor design, the leaks have brought us a new codename 'Strix Point', which is associated with [a] Zen5 based APU, supposedly also featuring smaller cores known as Zen4D. The latter is a codename of the smaller core.
Just two days ago, an AMD patent on 'task transition between heterogeneous processors' has been published. This patent was originally filed in December 2019, which suggests AMD has clearly been working on this technology for a long time. The patent covers the most important engineering problem of heterogeneous computing, which is how to schedule or transition tasks between different types of cores.
It looks like both Intel and AMD will adopt heterogeneous x86 microarchitectures in future desktop and mobile processors. Smaller cores can deliver better performance-per-Watt and performance-per-mm2 of die area, allowing for greater potential gains in multi-threaded performance, while big cores deliver better single-thread performance.
Intel's Alder Lake desktop CPUs will have up to 8 big and 8 small cores, and are expected to be announced or launched around October 25. It will support both DDR4 and DDR5 memory depending on the motherboard used. Intel is rumored to follow that up with Raptor Lake CPUs in 2022 featuring 8 big and 16 small cores.
The rumored AMD Strix Point APUs could launch as late as 2024, with a mix of Zen 5 (big) and "Zen 4D" (small) cores on TSMC's "3nm" process.
Also at Tom's Hardware.
Previously: Intel Architecture Day 2020: Tiger Lake, Alder Lake, Discrete GPUs, and More
Related Stories
Intel shared a number of product announcements at its Intel Architecture Day 2020, and later, at Hot Chips 2020.
Intel's upcoming "Tiger Lake" mobile processors will improve performance with "Willow Cove" cores (a small IPC gain from "Sunny Cove", but higher clock speeds), and feature Intel Xe integrated graphics with up to 96 execution units. The chips use an upgraded "10nm" process Intel calls "10nm SuperFin", indicating improvements to the FinFET transistor technology. Intel claims this is the "largest single intranode enhancement in Intel history", with a 17-18% transistor performance jump from their original "10nm" node (and most elusive one?).
Intel's Alder Lake hybrid/heterogeneous desktop CPUs are set to be released in 2021. These will use a big/small core configuration that first appeared in Intel's Lakefield, and is similar to ARM's big.LITTLE (which was redesigned for more flexibility as DynamIQ). Alder Lake will use big "Golden Cove" cores which are the successor to Sunny/Willow Cove, and "Gracemont" Atom cores. Leaks point to configurations topping out at "8+8" (8 big cores, 8 small cores).
Intel plans to launch a high-performance discrete "Xe-HPG" GPU for gamers in 2021, but will use a third-party fab to build it. The GPUs will support real-time ray-tracing, like Nvidia and AMD's next-generation GPUs. Leaks indicate that TSMC will build the GPUs, using a "6nm" node.
(Score: 4, Funny) by Frosty Piss on Monday June 14 2021, @09:48AM
I see a lot of opportunities for synergies with blockchain quantum AI and bleeding edge 6G shape shifting to bring about high availability in new edge premium stock options for executive mind banks.
(Score: 2) by looorg on Monday June 14 2021, @11:33AM (13 children)
CPU speed, for desktop computers, appear to have stagnated and has not increased significant in many years possibly up to a decade or so, it's still mostly in the 3-5GHz range. With a common bulk of it still around 3.5-4Ghz. It was fixed by having more and more cores so it felt, or was faster. There was a minor reason to upgrade at least. That need has felt quite low for quite some time now. Is this just the end of the line CPU wise? They have reached the top by or of the current technology? They can't make it faster, they can't cram more core in there so we are now left with trying to do the best with what we have?
I don't claim to actually understand this "task transition between heterogeneous processors" but from the article it sounds more like it's about optimizing the allocation of tasks then actual processor improvements. I guess there was a lot of waste before.
(Score: 2) by PiMuNu on Monday June 14 2021, @11:35AM (9 children)
Sounds like it is bullshit bingo to cover the fact that they are out of ideas? Anyone to defend it?
(Score: 4, Interesting) by takyon on Monday June 14 2021, @12:18PM (8 children)
You get the single-thread performance you need on the 8 big cores. Most game engines aren't going to use more than 8 cores since the next-gen (now current-gen) consoles have 8 cores. Other common applications don't even need that many. If you are only using 1 core heavily, it can switch in real time based on the heating of the die.
In the case of Alder Lake, about 4 small cores can fit into the die area of 1 big core. There is no hyperthreading on the small cores and they clock lower. But if they can deliver at least 25% of the performance of a big core, that is a performance-per-area advantage for multi-threaded applications, as long as the scheduling works. Even something modest like 30% the performance at 25% the die area is a 20% increase in performance-per-area (0.3 / 0.25 = 1.2). Power efficiency should also be better, although we'll need to see some numbers from Intel or benchmarks to determine that.
Alder Lake is 8 big, 8 small, and next-generation Raptor Lake is now expected to be 8 big, 16 small. Why not follow that trajectory further and increase the amount of small cores more and more? For example, 12 big and 64 small. If big/small (or just small) comes to server chips, you could see hundreds of small cores, dwarfing the core counts of the deceased Xeon Phi CPUs [wikipedia.org]. Intel will be using a tile (chiplet) based design starting with Sapphire Rapids, so they can just slap tiles full of cores together.
The really good gains will start coming once companies transition to fully 3D designs. There is some low-hanging fruit, e.g. AMD recently showed off a 15% improvement in gaming performance just by using 3D stacking to triple the amount of L3 cache on a CPU. Quick and dirty. Ultimately, getting gigabytes of memory as close to the CPU cores as possible without heating issues is what is needed. The GPU will have to go in there too.
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 2) by PiMuNu on Monday June 14 2021, @05:29PM
Thanks
(Score: 3, Interesting) by shortscreen on Monday June 14 2021, @05:34PM (6 children)
8 big cores are no better than 1 big core for a single-threaded program. Why not have the 1 big core, and then 8 small cores for things that are actually multithreaded?
(Score: 2) by takyon on Monday June 14 2021, @06:30PM
If an application is multi-threaded but can only use a limited number of cores, then it's better to have those cores be as fast as possible. Both the Xbox Series X/S and PS5 have 8 "big" Zen 2 cores with support for 2 threads per core, so that will become the minimum standard for gaming for about a decade. You can expect utilization of that many cores (maybe less), but shouldn't expect huge benefits beyond that. However, it has been argued that you want even more cores to do the job of dedicated hardware in the consoles, and maybe the small cores can handle some of that:
https://www.eurogamer.net/articles/digitalfoundry-2020-playstation-5-specs-and-tech-that-deliver-sonys-next-gen-vision [eurogamer.net]
Other applications can probably benefit from having 2-4 big cores since that has been the standard for a long time now. A web browser can obviously use more than 1 big core, but I don't think you would get much benefit from an absurd number of cores, like 64.
For anything that can scale to as many cores as you can throw at it, like a compiler, video encoder, Blender, etc., you would like to have as many big cores as possible, but a greater number of small cores would also be acceptable and more cost-efficient. Which is why we will see 8+8 become 8+16.
Alder Lake is replacing Comet Lake which had up to 10 big cores, and Rocket Lake which had to be dropped back down to 8.
Intel's "beta test" of hybrid x86 was Lakefield, a low TDP chip with 1 big and 4 small cores. Intel is still launching desktop chips with small Atom cores, such as Jasper Lake [wikipedia.org]. Future low TDP lineups should definitely move towards configurations like 1+8, because it would simply be faster than it was previously when limited to only Atom cores. Mobile chips could also use configurations like that, but we will see 6+8 and even the full 8+8 crammed into gaming laptops.
On the ARM side, we are seeing huge/big/small, e.g. 1x Cortex-X1, 3x Cortex-A78, 4x Cortex-A55. It could be a long time before we see any SoCs with more than one Cortex-Xn core. The Cortex-X1 is similar but physically larger than the Cortex-A78, usually has more cache, etc.
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(Score: 2) by looorg on Monday June 14 2021, @07:05PM (4 children)
Perhaps that is the current issue then, finding the ratio of big cores to small cores. 3-4 big to 12-16 small if the die space is one big to four small (size, power, heat etc). Thing then do you really need that many small cores?
(Score: 2) by takyon on Monday June 14 2021, @07:39PM (3 children)
"Need" is a strong word. Someone here is still running a single-core Athlon XP 2000+ in the corner somewhere. Most of the systems being sold today have 6 cores. And in fact it looks like Alder Lake will include a die with 6 big, 0 small. 6+0 would be a cheap i5-10400/i5-11400 replacement, with cut down 4+0 as the i3-10100 replacement.
If you assume/mandate that a gaming-oriented system should have 8 big cores, that breaks the ratio. Alder Lake is at 1:1, which is odd but a start, but it looks like Raptor Lake will change that to 1:2. The proportion could change every generation.
The high core count custom ARM chips for Apple Mac Pros and the like are rumored to reverse that with a 3:1 ratio [techradar.com]. 24/32/48 big and 8/12/16 small. Does that make sense?
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 2) by takyon on Monday June 14 2021, @07:41PM
*24/36/48 big and 8/12/16 small. Total cores: 32/48/64.
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 2) by looorg on Monday June 14 2021, @08:16PM (1 child)
Fine, need might be strong. But clearly people think they "need" a lot of things as far as computers are concerned to do even the most basic and mundane tasks. Like you need a modern computer to do internet stuff, read some mail and some light word processing. Clearly you don't. But they want it, or they don't know better, but wants becomes needs.
(Score: 2) by takyon on Monday June 14 2021, @08:38PM
Well, who knows? I subbed this so we could get at least one discussion on this topic before Alder Lake launches in October, and after that we can see how well it performs.
The concept of adding small cores even when there are no immediate power constraints makes sense, as long as the operating system can handle it. From there, it comes down to how much multi-threaded performance you need. If you don't need more now, maybe getting it out on the market now will spur the development of software that can use it. Kind of like how 16 cores can be found in a "mainstream" CPU now (the 3950X and 5950X), not some server chip or hypothetical product.
I could see ratios like 1:32 being feasible on certain server CPU models. Like 8 big + 256 small, which sounds absurd but would have a die area equivalent of 72 big cores (Sapphire Rapids will have 56 cores, and possibly 72 cores cut down from an 80-core design [tomshardware.com]).
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 2) by takyon on Monday June 14 2021, @12:35PM
Identical cores are easier to deal with than non-identical cores.
Technically, they are cramming more cores in there. In Alder Lake, 8 small "Gracemont" cores should take up around the same die area as 2 big "Golden Cove" cores. If a small core has better than 25% the performance of a big core, the big/small approach wins for increasing multi-threaded performance. You can even give the small cores an unfair advantage by disabling hyperthreading [theregister.com] on the big ones.
Alder Lake transitions the desktop platform from "14nm" to "10nm", an improvement of the "current technology". Meteor Lake should be on "7nm" around 2023, and Intel has planned nodes down to "1.4nm".
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 0) by Anonymous Coward on Tuesday June 15 2021, @01:36PM (1 child)
Please learn more about what you're commenting about before commenting. Single thread performance has increased significantly. Just not as much as multithreaded performance.
https://www.cpubenchmark.net/singleThread.html [cpubenchmark.net]
https://www.7-cpu.com/ [7-cpu.com]
(Score: 0) by Anonymous Coward on Wednesday June 16 2021, @06:51AM
Yep. We've long passed the days of the MHz wars but it is too bad that too many people bought into Intel's push of the https://en.wikipedia.org/wiki/Megahertz_myth [wikipedia.org]
(Score: 2, Interesting) by shrewdsheep on Monday June 14 2021, @01:26PM (3 children)
I am wondering how AMD would ever be able to enforce the patent. There will be some scheduling policy on other hetergeneous CPUs but the onus will be on AMD to prove they stole the patent. Hey, your scheduler is running really well, you must have stolen our patent. AMD will have to reverse engineer another processor to prove the point, which seems almost impossible. What am I missing?
(Score: 0) by Anonymous Coward on Monday June 14 2021, @01:30PM
Whistleblowers.
(Score: 2) by takyon on Monday June 14 2021, @01:56PM (1 child)
Just patent everything and do a cross-licensing agreement.
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 0) by Anonymous Coward on Tuesday June 15 2021, @05:51AM
This is probably the key. AMD, Intel, and a couple others have a huge x86/x86_64 patent pool. And enforcement shouldn't be too hard because people decap processors all the time.