http://www.e-basteln.de/computing/65f02/65f02/
The 6502 was the CPU in my first computer (an Apple II plus), as well as many other popular home computers of the late 1970s and 80s. It lived on well into the 1990s in game consoles and chess computers, mostly in its updated “65C02” CMOS version. Here’s a re-implementation of the 65C02 in an FPGA, in a pin-compatible format that lets you upgrade those old computers and games to 100 MHz clock rate!
The concept
The idea of implementing a CPU core inside an FPGA is not new, of course. In fact, the CPU core I am using is not my own, but was developed as a 6502 core by Arlet Ottens, and extended to cover the 65C02 opcodes by Ed Spittles and David Banks. A big thank-you to Arlet, Ed, and Dave for developing the core and sharing it freely! Links to their original work are on the Files & Links page.
(Score: 5, Funny) by Tork on Wednesday October 13 2021, @11:07PM (1 child)
🏳️🌈 Proud Ally 🏳️🌈
(Score: 0) by Anonymous Coward on Thursday October 14 2021, @01:15AM
6502, "bending unit," eh? Bender? You know, the drunk robot with 6502 for brain? Our favorite robot along with Marvin?
Come on. Mod him up.
(Score: 1, Informative) by Anonymous Coward on Wednesday October 13 2021, @11:07PM (2 children)
Got rid of bunch of expensive (transistor-wise) op-codes from Motorola 6800, consequently running the remaining instructions a good bit faster, not to mention hella cheaper than 6800.
(Score: 1) by Acabatag on Thursday October 14 2021, @11:00PM (1 child)
In other words a cut-rate 6800 knockoff.
(Score: 0) by Anonymous Coward on Friday October 15 2021, @01:28AM
Think of the 6502 as the REFACTORED, OPTIMIZED 6800.
(Score: 5, Interesting) by martyb on Thursday October 14 2021, @12:17AM (10 children)
When I read this story, I immediately thought of this page:
http://www.visual6502.org/ [visual6502.org]:
Former owner of an OSI Challenger 4P [wikipedia.org], an Atari 800 [wikipedia.org], and a Commodore 64 [wikipedia.org].
I miss the days when my computer booted nearly instantaneously!
Wit is intellect, dancing.
(Score: 3, Insightful) by Anonymous Coward on Thursday October 14 2021, @12:20AM (5 children)
And understood all the ins and outs of CPU/memory/IO. Those days are long gone.
(Score: 2) by martyb on Thursday October 14 2021, @01:00AM (4 children)
My OSI Challenger 4P even included complete schematics printed inside the case!
Imagine if they did that with, say, a current-day Ryzen! (Never mind all the support chips for PCI, networking, USB, etc.)
Wit is intellect, dancing.
(Score: 2) by corey on Thursday October 14 2021, @10:38PM (2 children)
Yep that was common back then. I found a Sanyo ghetto blaster with manual on a nature strip (the bit between the road and the foot path (side walk)). In the back of the manual it has a full schematic of the whole unit. But back then if it stopped working, you’d take it to a repair workshop (if you were not an EE). These days when something stops, you chuck it and but a new one. Sad. I blame China (and planned obsolescence, and capitalism).
(Score: 0) by Anonymous Coward on Thursday October 14 2021, @10:48PM
I blame custom integrated circuits and miniaturization more.
(Score: 1) by anubi on Friday October 15 2021, @12:28AM
With the advent of robotic assembly, economies of scale, runs of specialized components, tremendous gains in component reliability yet inexpensive to make, trying to maintain a supply chain of replacement parts becomes an exercise in futility.
It becomes like trying to fix a burned out CCFL. The inverter is usually still operable. Yet we change the whole thing.
So far I have happily accepted inexpensive "throwaway electronics" in the same manner as CCFL bulbs...with the exception of wired in place batteries. The age, lose capacity, and often I need to field swap for another battery that has a fresh charge.
But for expensive stuff, such as laptops and major appliances, I heavily consider "can I fix this thing?" in a purchase decision. My "new" washing machine is a rescue from the trash truck. Old Kenmore. I can maintain that thing nearly indefinitely. I can't fix the new ones.
"Prove all things; hold fast that which is good." [KJV: I Thessalonians 5:21]
(Score: 2, Informative) by Acabatag on Thursday October 14 2021, @11:06PM
You had to buy it seperately, but the IBM PC had a published Tehnical Reference Manual with full schematics. That included the schematics of the floppy drive and power supply. Plus it has the commented source code for the BIOS. I have the same material for a number of other machines of that era, including the Compaq Deskpro 386 and the AT&T 6300. I think I remember that the 6300 techref has the schematic for the hard drive.
IBM didn't keep secrets about the PC.
(Score: 2) by martyb on Thursday October 14 2021, @12:32AM (2 children)
My AdBlockers seem to block the page from running the simulation (which depicts the gates' activations as it runs 6502 code!).
Is there anybody here who can get it to work, or is there a genuine reason for the page being blocked?
As for as I can tell I am not "holding it wrong". =)
Wit is intellect, dancing.
(Score: 0, Troll) by Anonymous Coward on Thursday October 14 2021, @12:40AM (1 child)
What are you, sum kinda boomer? Use uBlock ORIGIN - it's the breakfast of champion blockers.
(Score: 2) by martyb on Friday October 15 2021, @03:07AM
What makes you assume I do not?
I have "uBlock ORIGIN" (as well as "NoScript") installed.
Wit is intellect, dancing.
(Score: 0) by Anonymous Coward on Friday October 15 2021, @05:31PM
(Score: 4, Interesting) by SomeGuy on Thursday October 14 2021, @01:41AM (9 children)
A long time ago I fiddled with different timer crystals in an Apple II Plus - changing the speed would throw off the video sync, it would throw off the bit rate that it wrote to the floppy disk. Of course, change it too far from the normal speed and it wouldn't work at all.
In a way, one of the nice things about the IBM PC was that it didn't try and get clever about re-using logic. Both floppy and video had their own micro controllers. as well as a programmable interrupt timer that programs like games could use for timing. For the most part, the CPU was free to go as fast as it wanted.
There was the "zip chip", that accelerated Apple IIs to 2x or 4x the speed, and like this thing it had to slow down to do certain I/O.
(Score: 2, Touché) by Anonymous Coward on Thursday October 14 2021, @02:27AM
As someone who remembers clicking off the turbo button to play a game, the PC wasn't that much better an environment.
(Score: 2) by dltaylor on Thursday October 14 2021, @02:55AM (1 child)
Compaq made a PC-equivalent with a faster 8086 (2X memory bandwidth, faster clock). It had a button to cripple it so it ran as badly as an IBM PC or XT.
I put NEC chips in every 8088/8086 PC I was forced to use (didn't build one until the AMD K5 PR100), as well as in my Amiga Bridgeboard (best MS-DOS machine I ever used).
(Score: 0) by Anonymous Coward on Thursday October 14 2021, @03:30AM
I benchmarked MessyDos on my Amiga. On a 7MHz 68000, it emulated a 33MHz '86 machine.
(Score: 2) by epitaxial on Thursday October 14 2021, @04:44PM (4 children)
Well what do you expect from one man working in a garage compared to a billion dollar corporation with decades of prior research? Woz did many brilliant hacks and tricks to get the Apple to perform as well as it did. That says more about his design than something from a building full of engineers.
(Score: -1, Troll) by Anonymous Coward on Thursday October 14 2021, @05:35PM (1 child)
That it was a kludgy and unprofessional design?
(Score: 1, Insightful) by Anonymous Coward on Thursday October 14 2021, @10:44PM
It was the right design at the time.
Woz ruthlessly reduced the part count. This meant it was "more" affordable. (Well, it also meant a higher profit margin for Apple!) Now, that crazy, super-integrated design of course meant it was too hard to expand the Apple II design in an incremental fashion. To take the platform forward, they had to scrap the old architecture. This led to the Apple IIgs which came too late in my opinion.
(Score: 2) by ChrisMaple on Friday October 15 2021, @06:33PM (1 child)
The IBM PC motherboard was a straightforward and unoriginal design, using off-the-shelf parts. The most creative part was finding a way to use more than 64k memory. The idea that decades of prior research was reflected in the design is funny.
(Score: 2) by epitaxial on Monday October 18 2021, @06:29PM
I meant IBM had been building computers for decades, not just the XT.
(Score: 2) by edIII on Saturday October 16 2021, @11:21PM
Wouldn't this make the original games and code run way too fast? I remember a time with emulation that running the games on contemporary hardware would cause them to be so fast as to be unusable. You actually had to use settings in the emulation to *slow* it down to be playable.
Technically, lunchtime is at any moment. It's just a wave function.
(Score: 3, Interesting) by KritonK on Thursday October 14 2021, @08:27AM (1 child)
A long time ago, in a galaxy far far away, my main computer was a BBC Micro, which had a 6502 running at 2 MHz.
I liked to fiddle with its hardware, and one upgrade I tried was to replace the stock 6502 with a 65C02. The first thing I tried after the upgrade was to run a game I used to play at the time. The result was jerky movement and flickering, as the game had been timed exactly to the instruction timing of the stock 6502. Needless to say, I switched back to the original 7602.
If this was the result from small variations in instruction timing at 2 MHz, I shudder to think what would happen not only with a different implementation of the CPU, but with 50-fold increase in clock frequency as well.
As for performing calculations with this new CPU, I would think that one would have moved to even more powerful CPUs a long time ago, to perform said calculations. I guess this is a niche product for exactly the kind of use they envisioned, i.e., upgrading 80s style chess machines which, presumably, would benefit from a much faster CPU, as they would be able to search more positions in a given amount of time, assuming they don't run out of memory or encounter other bugs, due to the increased number of calculations.
(Score: 4, Interesting) by looorg on Thursday October 14 2021, @10:53AM
This would be my main concern with this upgrade to. You could probably write, or rewrite, new software for it that would be more or less fine. But a lot of old software will or could probably act very weird. The main issue here is timing, or various tricks used to time and delay things now being performed so much faster. Some games could more or less be press f1 to start and the next thing you see if the game over screen as things have just flown past and across the screen. So there pretty much needs to be some kind of choke that you can use that forces things down to the old normal speed when and if needed.
From reading the site tho as you note it seems to them that the primary usage here is for old chess machines. For them I assume things will just be fine, since it should mainly be about then calculating the tree-graph of possible moves and pick the best one and if that becomes faster then less wait time for you.
That said if it works fine, or can be tweaked for the other codes and be made compliant with say 6510 as he mentions, and you could get say a 100 MHz C64 running cheaply that could also have it's fun. But as noted it could break more then it fixes.
(Score: 3, Interesting) by Rich on Thursday October 14 2021, @11:04AM (5 children)
Cranking up the 6502's clock isn't going to cut it unless the RAM is sped up as well. Going from 1 to 100 MHz would require a reduction in access time from about 200ns to 2ns. That's even way beyond what modern DRAM can do. I thought, maybe they laid out zero page (which is kind of considered to be the "real" registers) and stack (right next to it) with fast coupling, but as I read the article, they seem to have a full 64K at that speed. I wonder how that can be fast enough, is FPGA attached RAM that fast? They do throttling for IO, btw, so the Apple II floppy works. They would need to write through to the video address range, too, but that at least might be done asynchronously.
Around 1990, I had a modded //c (DIY-320K, Zip 8, RTC) which I mostly used as notepad and address file, because it went from cold to application (AppleWorks) in 8 seconds, much faster than my IIgs or Mac Plus. That would now boot faster than the CRT could heat up! (The disk might still slow it, but a solid-state solution could feed nibbles in read mode much faster, too. Writing requires the 32us software timing).
(Score: 2) by looorg on Thursday October 14 2021, @12:20PM
That could be an issue, but as he states the primary product for this appears to be those small portable Chess machines. So for them it probably doesn't matter. Since it will never evaluate ALL moves but some moves or a selection of moves and then pick the best of it. The higher the level, or the higher the ELO, of the game there may or might be more moves or longer chains to evaluate but it's probably still a very limited selection of moves that get evaluated. There things will just be better if it's faster as it will be less wait time between turns. It won't evaluate more moves, it will just evaluate them faster -- a lot faster. So it's some way off from a personal computer of some kind (Apple, PET, ACORN, C64 or whatever) as it opens up so many more possibilities while the Chess Machine is fairly locked down.
But as you note it can't crunch faster then the memory can handle it. But it will still probably be a significant performance increase for the Chess machines at least.
(Score: 2) by looorg on Thursday October 14 2021, @01:06PM (1 child)
Had a bit of a further look and think about it. There are images on his site of a Mephisto Milano chess computer with the board inserted in the CPU slot. At the same image you can see a MEC 49152 crystal oscillator. So that is 4,9152 MHz. That will be weird if you have a 100MHz CPU. But even further down, at the bottom of, the page he shows images of the board and on the back it has it's own crystal oscillator. It's even pointed out.
So the old hardware probably just doesn't matter in that regard with the new CPU board inserted. It has it's own memory, it's own clock etc. All the old hardware does is feeding it things to be computed and it in return returns answers at it's full speed. That the old hardware then displays.
Question then is how much is the CPU board controlling. Is it in essence the machine now in that the old hardware doesn't matter much at all or is the machine choked here then. The old hardware still runs at 2-2,5 Mhz doing its thing? For a chess machine this might not matter. The chess moves are calculated at 100Mhz and the result or pick is fed back to the old hardware that executes that move. The wait time for the Mephisto to "think" just gets cut drastically.
The Mephisto in this case still, probably, runs at 2Mhz or 2,5 MHz or whatever it is according to it's crystal. So the old machine doesn't really run at 100Mhz. The CPU board just computes problems at 100 MHz and feeds the answers back to the old slow machine for display.
There might not really be a lot of timing issues. Since the old machine hardware still operates at original speed. So this is probably perfect for a Chess machine, not sure if it's as important for an old computer. Most of them will not really be used for their computing or number crunching power.
(Score: 2) by Rich on Thursday October 14 2021, @02:22PM
They write that they can work in an Apple II including the floppy, and they are working on the language card, but could not access more than 64K due to the Spartan's SRAM size. Apparently that SRAM is fast enough to make a 6502 at 100 MHz happy. They also write that the IO layout needs to be written to the FPGA specifically for the machine. For the language card, they have to decide whether a RAM access, or a ROM access is done, according to the soft switches. Because they pre-load the ROM to FPGA, the RAM access would have to be slowed down (which has the nice side effect that a 128K Saturn card, which my II+ has, would also work (slowly)). They COULD use the remaining 4K (C000-CFFF) for caching language card content, UCSD Pascal would be happy, but that's quite an effort for such a hobby project. It might be worth it, because the alternate bank (or banks, with a Ramworks III) on the //e&c would benefit from caching.
There is no cache logic like in the ZIP chip, it's either a host system access in which case the fast core syncs to the external clock, or a local access that runs at the 100 MHz on-module clock. The matter of HOW the host system is accessed is the interesting part. Some addresses might just need syncing on read/write. With the Apple II floppy, however, one must throttle as soon as the floppy motor spins, not just on accesses, because timing loops for the head stepper and nibble writing are critical. On the other hand, the video ranges can be read fast, but have to be written through, or nothing would appear on the screen - but the write through can be "detached" and run in parallel. The fast core would then only stop if a write is pending (or, more advanced, a write queue is full).
By the way, there is actually some real-life benefit to such exercises. A customer of mine had to replace 68HC11 motor and sensor controllers after the CPUs were end-of-lifed. Rather than re-writing the software for dozens of little modules, they made a replacement with a Spartan (I just don't remember if 3 or 6). I've heard the term "neo-retro-computing", which I like. Because if development is constrained to about 1985 technology, it is feasible to replace the hardware core without all the software and periphery, which might have grown to magnitudes more of complexity than the CPU core.
(Score: 2) by shortscreen on Thursday October 14 2021, @02:25PM (1 child)
The XC6SLX9 FPGA has 576K bits of internal "block RAM" which is SRAM. I don't know the speed rating on that chip, but on Cyclone IVs you can push the internal RAM up to a few hundred MHz, so that should be fast enough to both initiate and complete a memory access during one 100MHz clock period.
(Score: 2) by ChrisMaple on Friday October 15 2021, @06:59PM
Using internal FPGA RAM sounds like a good strategy. If using external RAM is necessary, 10 ns devices are available from Cypress that are much larger than a 6502 can access all of. At worst, 1 wait state would be needed for memory access cycles.
Going with a state-of-the-art ASIC, standard cell or full custom or whatever, could push 6502 speeds to many 100s of MHz. Fun idea, but the logic of a 6502 CPU would be so small that it would be wasteful not to add other capabilities.