from the double-double-lithography-trouble dept.
Intel Unveils Plan to 'Propel Moore's Law Beyond 2025':
In its relentless pursuit of Moore's Law, Intel is unveiling key packaging, transistor and quantum physics breakthroughs fundamental to advancing and accelerating computing well into the next decade. At IEEE International Electron Devices Meeting (IEDM) 2021, Intel outlined its path toward more than 10x interconnect density improvement in packaging with hybrid bonding, 30% to 50% area improvement in transistor scaling, major breakthroughs in new power and memory technologies, and new concepts in physics that may one day revolutionize computing.
"At Intel, the research and innovation necessary for advancing Moore's Law never stops. Our Components Research Group is sharing key research breakthroughs at IEDM 2021 in bringing revolutionary process and packaging technologies to meet the insatiable demand for powerful computing that our industry and society depend on. This is the result of our best scientists' and engineers' tireless work. They continue to be at the forefront of innovations for continuing Moore's Law." –Robert Chau, Intel Senior Fellow and general manager of Components Research
Moore's Law has been tracking innovations in computing that meet the demands of every technology generation from mainframes to mobile phones. This evolution is continuing today as we move into a new era of computing with unlimited data and artificial intelligence.
Continuous innovation is the cornerstone of Moore's Law. Intel's Components Research Group is committed to innovating across three key areas: essential scaling technologies for delivering more transistors; new silicon capabilities for power and memory gains; and exploration of new concepts in physics to revolutionize the way the world does computing. Many of the innovations that broke through previous barriers of Moore's Law and are in today's products started with the work of Component Research – including strained silicon, Hi-K metal gates, FinFET transistors, RibbonFET, and packaging innovations including EMIB and Foveros Direct.
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Chips "going... down in price is a story of the past," CEO says:
When Nvidia rolled out its new RTX 40-series graphics cards earlier this week, many gamers and industry watchers were a bit shocked at the asking prices the company was putting on its latest top-of-the-line hardware. New heights in raw power also came with new heights as far as MSRP, which falls in the $899 to $1,599 range for the 40-series cards.
When asked about those price increases, Nvidia CEO Jensen Huang told the gathered press to, in effect, get used to it. "Moore's law is dead," Huang said during a Q&A, as reported by Digital Trends. "A 12-inch wafer is a lot more expensive today. The idea that the chip is going to go down in price is a story of the past."
[...] Generational price comparisons aside, Huang's blanket assertion that "Moore's law is dead" is a bit shocking for a company whose bread and butter has been releasing graphics cards that roughly double in comparable processing power every year. But the prediction is far from a new one, either for Huang—who said the same thing in 2019 and 2017—or for the wider industry—the International Technology Roadmap for Semiconductors formally announced it would stop chasing the benchmark in its 2016 roadmap for chip development.
[...] As Kevin Kelly laid out in a 2009 piece, though, Moore's law is best understood not as a law of physics but as a law of economics and corporate motivation. Processing power keeps doubling partly because consumers expect it to keep doubling and finding uses for that extra power.
That consumer demand, in turn, pushes companies to find new ways to keep pace with expectations. In the recent past, that market push led to innovations like tri-gate 3D transistors and production process improvements that continually shrink the size of individual transistors, which IBM can now push out at just 2 nm.
(Score: 5, Interesting) by Anonymous Coward on Monday December 13 2021, @04:48PM (9 children)
Disclaimer: I work for Intel, but not for long. Have already informed my boss of plans to retire in 2022. As an insider, I state that Intel is completely dysfunctional and has been since around 2014 when a prior CEO had some "efficiency company" come in and fire all of the long time experts on Intel Architecture and design. I've been seeing new "specifications" that read more like a B- highschool project. Personally, I recommend that you never buy a Lunar Lake CPU. I don't have the same complaints about the Xeon lines -- those architects can still at least put out somewhat decent specifications. But avoid Intel client space like the plague. Buy AMD.
Realistically the article title should read more like "Intel unveils plan from current CEO for years after he will have retired."
i.e., this is bullshit corporate propaganda, because a CEOs plans can only really last as long as he is the CEO, and in 2025, when Gelsinger turns 65 and is forced to retire, then another CEO will be appointed and make his own plans for the company.
(Score: 0) by Anonymous Coward on Monday December 13 2021, @05:37PM (4 children)
Who modded +4 Interesting?
Either has never worked at Intel and is trolling or is a disgruntled "whistleblower" who should be grateful of a job during COVID. You've only just started there and you're retiring? No great loss.
And if it's the latter then it's only 5 years before RISC-V destroys the WinAMD alliance in any case.
(Score: 0) by Anonymous Coward on Monday December 13 2021, @05:41PM (3 children)
Where did you get the notion that I've only just started at Intel? Been at the company since the late 90s and have outlasted 3 CEOs.
(Score: 0) by Anonymous Coward on Tuesday December 14 2021, @08:53PM (2 children)
You've rounded-out the best posts here in ages. Thank you!
I feel it's just plain time to leave x86 as a beloved part of our history.
(Score: 2) by takyon on Wednesday December 15 2021, @12:49AM (1 child)
Nah. ARM is still a disaster, and RISC-V will also fragment.
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(Score: 0) by Anonymous Coward on Wednesday December 15 2021, @02:22AM
I can still taste a little 4004 in every byte.
(Score: 2) by PiMuNu on Monday December 13 2021, @05:49PM (1 child)
Get a consultancy job in company. Retire or bribe anyone competent. Get your consultants into positions of power. Leech as much money off the outfit as possible.
With luck, it's a government outfit so the leeching can just go on and on ad infinitum.
(Score: 1, Interesting) by Anonymous Coward on Monday December 13 2021, @06:14PM
The business majors have been leeching Intel dry for a few years now. Intel's stock price looks good over the last 5 years, but its market share does not. The business/finance majors are making decisions which prop up the stock price at the expense of the companies long term competitiveness.
When the last CEO was 'fired' it was for a completely bullshit story about a relationship he had with another Intel employee.... only Intel's policy that disallowed relationships was NOT yet in place when this occurred. So the entire story that the Board of Directors spun to justify removing the CEO was fabricated.
My personal opinion is that Krzanich was promoted to CEO by the board knowing that they were going to remove him, once he helped them implement their 2014 mass layoffs (of mostly older/experienced engineers who cost them more money than Malaysian employees). They made sure to let Krzanich remain the CEO for 5 years before removing him. This was because he had to remain CEO for that many years to get his safety-umbrella of millions and millions of dollars when they terminated his position. Then, knowing that these layoffs would trigger very strong resentment among the current employee base, they came up with this "improper relationship" excuse as the reason for his termination -- because of course the truth would make the board look very bad.
(Score: 2) by takyon on Monday December 13 2021, @10:26PM
Now that's interesting.
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 0) by Anonymous Coward on Tuesday December 14 2021, @09:59AM
People always seem to ask why Intel keeps getting outdone by AMD as of late. I've even seen comments on this site asking "Why doesn't Intel just outcompete AMD?" The answer is simple: they've forgotten how on an institutional level. I've heard it again and again from people who would know. The MBAs cut costs from everywhere to get their quarterly numbers up but damaged them in the long term. As you suggest, their server space is the only real place they've stayed competitive because that is the only place the MBA techniques don't work. Plus I've heard the server space is where the nice jobs and engineering is because price is no object, unlike the consumer space. So the talent they have held on to have mostly moved there.
(Score: 1) by shrewdsheep on Monday December 13 2021, @05:18PM (7 children)
Moore's law in its initial incarnation is dead for a long time now (the number of transistors thing) - about 10 years. People have started redefining the law to claim it being alive and well. I can make it much more simple for Intel: I hereby redefine Moore's law to be always true. Actually, this is what they say, now that I think of it.
OTOH Intel might want to catch up with AMD first, before becoming ambitious in any way.
(Score: 2, Interesting) by Anonymous Coward on Monday December 13 2021, @05:28PM (6 children)
Same OP as the FP here. For anyone who understands exponentials, it makes sense that the original meaning of Moore's Law could not continue forever. We know this because in the 2010->2020 time-frame Intel CPU performance did NOT increase at the same rate as transistor counts.
So the number of transistors we have to simulate to prove that a design works is increasing rapidly... but the CPUs in our server farms are sometimes 7 years old, and even if they were brand new, the performance of those CPUs did not double. To make matters even worse, all current professional Verilog/Systemverilog simulators are single-threaded. So the modern CPU strategy of adding more cores and more threads does not help speed up the R&D process of silicon design.
This causes the D portion of R&D to take significantly longer, since we have to prove the functionality of more transistors than ever, but using the same old CPU performance we had for the last decade. Time to market slows way down, lots of more bubs escape into A0 silicon because management buries their head in the sand and keeps schedules the same, and you start seeing Intel CPUs needing B0, and C0, and D0, and if you follow Sapphire Rapids, even E0 steppings before the product is stable enough to make it customers. Each stepping adds at least 6 months to the products shipping schedule.
Intel's slogan really should be: Designing Tomorrow's CPUs with Yesterday's Technology
(Score: 2) by HiThere on Monday December 13 2021, @06:45PM (1 child)
Actually, "Moore's Law" could, in principle, have continued for considerably longer. But they would have needed to go into massive 3d chips, and there are problems with heat dissipation, etc. that make that difficult. (Not to mention aligning the various layers.)
That said, it continued valid for a lot longer than I expected. The problems with 3d construction are formidable.
Javascript is what you use to allow unknown third parties to run software you have no idea about on your computer.
(Score: 1, Interesting) by Anonymous Coward on Monday December 13 2021, @06:49PM
I think you misunderstand my argument. In order for Moores law to continue, you have to double the transistors every 18 months. But, if it takes you 2-3 years between each generation of silicon then you are not doubling every 18 months, you're doubling the transistor count every 24-36 months.
It is not possible for us to double transistor counts every 18 months anymore, because we have to actually simulate those designs on modern CPUs whose single-threaded performance is NOT increasing fast enough to allow us to put out silicon with a doubled transistor count every 18 months.
(Score: 2) by takyon on Monday December 13 2021, @10:40PM (3 children)
Isn't TSMC using 24/64-core Epyc CPUs [tomshardware.com] for that?
Good EDA software bout to be classified as a munition [arstechnica.com], lol.
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 1, Informative) by Anonymous Coward on Monday December 13 2021, @10:45PM (1 child)
With google's entry into hardware, there is now a large number of open-source EDA tools being developed. The cat's out of the bag, and the government isn't going to be able to put it back in.
https://chipsalliance.org [chipsalliance.org]
But to be fair, there are no open-source simulators that can compete with Synopsys, Mentor Technologies, or Cadence yet. But there are now Systemverilog parsers and elaboration tools that are rapidly approaching compliance with the IEEE 1800-2017 standard.
(Score: 0) by Anonymous Coward on Tuesday December 14 2021, @11:10AM
There's a few other interesting projects to watch here too, in principle you can get a full Verilog to ASIC toolflow running now using only open source tools
More on this if you look at the open road project: https://theopenroadproject.org/ [theopenroadproject.org]
Skyworks has opened up their 130nm standard cell library and is providing the full information as open source: https://skywater-pdk.readthedocs.io/en/main/ [readthedocs.io]
Google is sponsoring multi-project wafer production cost at Efabless, you can get a free tape-out if you make your design in their template and publish it as open source, they've gotten to the point that they are now collecting designs for the 4th run: https://efabless.com/projects/shuttle_name/MPW-4 [efabless.com]
For parallel simulation of spice netlists Xyce is also an interesting one, developed at Skandia together with DoD but the code is available as open source. Made to run on clusters but works nicely on smaller machines too: https://github.com/Xyce/Xyce/ [github.com]
(Score: 0) by Anonymous Coward on Monday December 13 2021, @10:49PM
Systemverilog designs and simulations are done by TSMCs customers, rather than TSMC. TSMC takes netlists produced from those Systemverilog designs and does layout and silicon fabrication, but they don't define or test the logic.
(Score: 3, Funny) by DannyB on Monday December 13 2021, @05:35PM (1 child)
⠀
To transfer files: right-click on file, pick Copy. Unplug mouse, plug mouse into other computer. Right-click, paste.
(Score: 2) by takyon on Monday December 13 2021, @10:41PM
An ME for every
atomquark in your body.[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 0) by Anonymous Coward on Tuesday December 14 2021, @02:59PM (2 children)
i assume since they make their chip bythemselfs and they see the "atom sized distances" approaching fast, that they're looking for other "stuff" to do.
might be risky, might not be?
it's not really "fair" to compare 10nm intel chip to 7,5 nm amd chip?
amd presses ahead, good, prolly knowing that even if the r&d pans out for intel, that they cannot allow themselfs to turn into a monopoly :)
(Score: 2) by takyon on Tuesday December 14 2021, @03:26PM
Intel renamed their nodes to more directly compare with TSMC's nodes.
If you see an Intel 7, that should be compared to TSMC N7, Intel 4 to TSMC N4, Intel 20A to TSMC N2, and so on.
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(Score: 1, Informative) by Anonymous Coward on Tuesday December 14 2021, @07:34PM
The whole "10nm" and "7nm" is completely arbitrary and specified by the marketing team of a company, not its engineers. The metric by which any one company uses to set their "nm" process name is not an industry standard, so comparing two companies processes based on the marketing name is an invalid way to compare from the beginning.