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posted by hubie on Monday May 23 2022, @06:46AM   Printer-friendly

Imec Presents Sub-1nm Process and Transistor Roadmap Until 2036: From Nanometers to the Angstrom Era

Imec, the most advanced semiconductor research firm in the world, recently shared its sub-'1nm' silicon and transistor roadmap at its Future Summit event in Antwerp, Belgium. The roadmap gives us a rough idea of the timelines through 2036 for the next major process nodes and transistor architectures the company will research and develop in its labs in cooperation with industry giants, like TSMC, Intel, Samsung, and ASML, among many others.

The roadmap includes breakthrough transistor designs that evolve from the standard FinFET transistors that will last until 3nm, to new Gate All Around (GAA) nanosheets and forksheet designs at 2nm and A7 (seven angstroms), respectively, followed by breakthrough designs like CFETs and atomic channels at A5 and A2. As a reminder, ten Angstroms are equal to 1nm, so Imec's roadmap encompasses sub-'1nm' process nodes.

TSMC to Initiate 1.4nm Process Technology R&D

At processor manufacturers, fundamental and applied research and development work never stops, so now that Taiwan Semiconductor Manufacturing Co. has outlined a timeline for its N2 (2 nm-class) fabrication process that will enter high-volume manufacturing (HVM) in 2025, it is time for the company to start thinking about a succeeding node. If a new rumor is to be believed, TSMC is set to formally announce its 1.4 nm-class technology in June.

TSMC plans to reassign the team that developed its N3 (3 nm-class) node to development of its 1.4 nm-class fabrication process in June, reports Business Korea. Typically, foundries and chip designers never formally announce R&D milestones, so we are unlikely going to see a TSMC press release saying that development of its 1.4 nm technology had been started. Meanwhile, TSMC is set to host its Technology Symposium in mid-June and there the company may outline some brief details about the node that will succeed its N2 manufacturing process.

N2 will be TSMC's first node to use gate-all-around field-effect transistors (GAAFETs). Subsequent nodes may use high-numerical aperture (high-NA) extreme ultraviolet (EUV) lithography instead of regular EUV.


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  • (Score: 1, Informative) by Anonymous Coward on Monday May 23 2022, @12:04PM (7 children)

    by Anonymous Coward on Monday May 23 2022, @12:04PM (#1247187)

    Worth a link and reading it. Illustrious unknowns, never heard of them and yet they seem quite a force in research - https://en.wikipedia.org/wiki/IMEC [wikipedia.org]

    • (Score: 0) by Anonymous Coward on Monday May 23 2022, @12:41PM

      by Anonymous Coward on Monday May 23 2022, @12:41PM (#1247196)

      It's like the Battelle Memorial Institute, but with more semiconductors.

    • (Score: 2) by FatPhil on Monday May 23 2022, @01:47PM (5 children)

      by FatPhil (863) <{pc-soylent} {at} {asdf.fi}> on Monday May 23 2022, @01:47PM (#1247209) Homepage
      """
      In 1982, the Flemish Government set up a program to strengthen the microelectronics industry in Flanders. This program included setting up a laboratory for advanced research in microelectronics (imec), a semiconductor foundry (former Alcatel Microelectronics, now STMicroelectronics and AMI Semiconductor,[4]) and a training program for VLSI design engineers. The latter is now fully integrated in the imec activities.
      """

      So, IMEC themselves don't have a fab? Is this just more slideware?
      --
      Great minds discuss ideas; average minds discuss events; small minds discuss people; the smallest discuss themselves
      • (Score: 3, Informative) by mce on Monday May 23 2022, @02:32PM (4 children)

        by mce (2811) on Monday May 23 2022, @02:32PM (#1247216)

        They don't have a typical full production fab, but they do have multiple production clean rooms. The oldest one dates back to the early days in 198x, even if it's not listed on the text you quoted. More clean rooms were added later. And even back in the 90s, they'd produce samples of their own chip designs. They just didn't do any kind of volume.

        It may surprise you, but they typically have the very latest and very best machinery before anyone else, because being a non-profit with many many many partnerships all of the world, the equipment manufacturers often are only too happy to have their newest tech showcase at IMEC even before the stuff is fully production released. Those companies basically use IMEC as a pre-sales channel, counting on the thousands of researchers who either get their PhD at IMEC, or who work as temporary residents for their regular employer (think of Intel, Samsung, ) seeing the new stuff stuff and getting the message out that "we/you want to have this".

        Disclaimer, I saw the IMEC-1 complex - clean room included - being built as a student and later worked there from 1988 to 2006.

        • (Score: 2) by FatPhil on Monday May 23 2022, @07:58PM

          by FatPhil (863) <{pc-soylent} {at} {asdf.fi}> on Monday May 23 2022, @07:58PM (#1247304) Homepage
          Interesting, thank you.

          I've also noticed that collabs do seem to have an advantage. Crolles, also in Europe, was able to be ahead of the curve whilst I was working for one of its members. They were even getting the jump on TSMC for some of the tech. However, then there was a bit of a hissy fit, the parties fell out, and things started to stall.
          --
          Great minds discuss ideas; average minds discuss events; small minds discuss people; the smallest discuss themselves
        • (Score: 0) by Anonymous Coward on Monday May 23 2022, @11:40PM (1 child)

          by Anonymous Coward on Monday May 23 2022, @11:40PM (#1247353)

          I wonder if the new MIT Nano lab is based on IMEC? Overview (with links) here,
          https://mitnano.mit.edu/research-capabilities [mit.edu]
          They are finishing up the new building and moving programs & equipment in.

          • (Score: 1) by mce on Tuesday May 24 2022, @08:11AM

            by mce (2811) on Tuesday May 24 2022, @08:11AM (#1247418)

            I'm not sure about it being "based on", but they obviously work on the same kind of things and the basic operational idea seems similar at first glance.

            What I am sure about, is that IMEC and MIT have co-developed many things in the past - a simple web search will return quite a few examples (note: duckduckgo's results are better than google's) - and also that people who started their research career at IMEC have moved on to MIT.

        • (Score: 1) by mce on Tuesday May 24 2022, @08:18AM

          by mce (2811) on Tuesday May 24 2022, @08:18AM (#1247420)

          The Economist has an article that mentions how lithography giant ASML got off the ground by using its ties to IMEC in the way I described:
          https://www.economist.com/business/2020/02/29/how-asml-became-chipmakings-biggest-monopoly [economist.com]

          Today, ASML and IMEC still cooperate on new lithography machine developments, as mentioned here:
          https://www.forbes.com/sites/tomcoughlin/2022/05/24/imec-details-roadmaps-for-advanced-logic-and-memory/ [forbes.com]

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