Stories
Slash Boxes
Comments

SoylentNews is people

posted by janrinok on Monday January 30 2023, @10:19PM   Printer-friendly

https://www.righto.com/2023/01/reverse-engineering-intel-8086.html

The 8086 processor was introduced in 1978 and has greatly influenced modern computing through the x86 architecture. One unusual instruction in this processor is HLT, which stops the processor and puts it in a halt state. In this blog post, I explain in detail how the halt circuitry is implemented and how it interacts with the 8086's architecture.

In this section, I'll explain how the HLT instruction is decoded and handled in the Execution Unit. The 8086 uses a combination of lookup ROMs, logic, and microcode to implement instructions. The process starts with the loader, a state machine that provides synchronization between the prefetch queue and the decoding circuitry. When an instruction byte is available, the loader provides a signal called First Clock that loads the instruction into the Instruction Register and starts the instruction decoding process.

Before microcode gets involved, the Group Decode ROM classifies instructions by producing about 15 signals, indicating properties such as instructions with a Mod R/M byte, instructions with a byte/word bit, instructions that always act on a byte, and so forth. For the HLT instruction, the Group Decode ROM provides two important signals. The first is one-byte logic (1BL), indicating that the instruction is one byte long and is implemented with logic circuitry rather than microcode.1 The second signal is produced for the HLT instruction specifically and generates the internal HALT signal. This signal travels to various parts of the 8086 to halt the processor.


Original Submission

This discussion was created by janrinok (52) for logged-in users only, but now has been archived. No new comments can be posted.
Display Options Threshold/Breakthrough Mark All as Read Mark All as Unread
The Fine Print: The following comments are owned by whoever posted them. We are not responsible for them in any way.
(1)
  • (Score: 5, Funny) by driverless on Tuesday January 31 2023, @02:44AM (3 children)

    by driverless (4770) on Tuesday January 31 2023, @02:44AM (#1289416)

    They implemented the HLT part but completely omitted the -and-catch-fire portion. Motorola at least got that one right.

    • (Score: 2) by Rosco P. Coltrane on Tuesday January 31 2023, @04:34AM (1 child)

      by Rosco P. Coltrane (4757) on Tuesday January 31 2023, @04:34AM (#1289431)

      You think that's bad? They can't even make a true NOP: tell me NOP itself isn't an operation. Right? TELL ME!
      Shame on Intel...

      • (Score: 2) by driverless on Tuesday January 31 2023, @04:42AM

        by driverless (4770) on Tuesday January 31 2023, @04:42AM (#1289433)

        Tell me about it! I want NOP to be a true NOP, not needlessly swapping eax with itself. All that wasted effort and energy just to fake out a real NOP like Motorola had.

    • (Score: 1, Interesting) by Anonymous Coward on Tuesday January 31 2023, @04:02PM

      by Anonymous Coward on Tuesday January 31 2023, @04:02PM (#1289482)

      Here's a look at the 6800 HCF instruction, along with some variations,
            https://x86.fr/investigating-the-halt-and-catch-fire-instruction-on-motorola-6800/ [x86.fr]
      Interesting guy, see his "About Me" page.

  • (Score: 2) by VLM on Tuesday January 31 2023, @04:12PM

    by VLM (445) Subscriber Badge on Tuesday January 31 2023, @04:12PM (#1289484)

    Everything posted on righto.com may as well get posted here, its all pretty cool.

    Ken is somehow associated with CuriousMarc (A mostly Youtube EE retrocomputer type guy)

(1)