TSMC: We Have Working CFET Transistors in the Lab, But They Are Generations Away:
Offering an update on its work with complementary field-effect transistors (CFETs) as part of the company's European Technology Symposium 2023, TSMC has revealed that it has working CFETs within its labs. But even with the progress TSMC has made so far, the technology is still in its early days, generations away from mass production. In the meantime, ahead of CFETs will come gate-all-around (GAA) transistors, which TSMC will be introducing with its TSMC's upcoming N2 (2nm-class) production nodes.
One of TSMC's long-term bets as the eventual successor to GAAFETs, CFETs are expected to offer advantages over GAAFETs and FinFETs when it comes to power efficiency, performance, and transistor density. However, these potential benefits are theoretical and dependent on overcoming significant technical challenges in fabrication and design. In particular, CFETs are projected to require the usage of extremely precise lithography (think High NA EUV tools) to integrate both n-type and p-type FETs into a single device, as well as determining the most ideal materials to ensure appropriate electronic properties.
Just like other chip fabs, TSMC is working on a variety of transistor design types, so having CFETs working in the lab is important. But it's also not something that is completely unexpected; researchers elsewhere have previously assembled CFETs, so now it's up to industry-focused TSMC to figure out how to bring about mass production. To that end, TSMC is stressing that CFETs are not in the near future.
"Let me make a clarification on that roadmap, everything beyond the nanosheet is something we will put on our [roadmap] to tell you there is still future out there," said Kevin Zhang, senior vice president at responsible for technology roadmap, business strategy. "We will continue to work on different options. I also have the add on to the one-dimensional material-[based transistors] [...], all of those are being researched on being investigated on the future potential candidates right now, we will not tell you exactly the transistor architecture will be beyond the nanosheet."
[...] "Nanosheet is starting at 2nm, it is reasonable to project and that nanosheet will be used for at least a couple of generations, right," asked Zhang rhetorically. "So, if you think about CFETs, we've leveraged [FinFETs] for five generations, which is more than 10 years. Maybe [device structure] is somebody else's problem to worry, then you can continue to write a story."
(Score: 2) by Mojibake Tengu on Monday May 29 2023, @03:45PM (5 children)
In other news...
https://www.taiwannews.com.tw/en/news/4886681 [taiwannews.com.tw]
Please note gladly this source is not a continental communist propaganda, but Taiwanese mainstream outlet conveying position of a Taiwanese government (since 1949).
So. Despite any tyrants far or near, my bet is on in ten to dozen years this TSMC-researched 2nm tech will bring some huge technological advancement to Unified China.
Respect Authorities. Know your social status. Woke responsibly.
(Score: 2) by quietus on Monday May 29 2023, @07:12PM (2 children)
Could it be that you glanced over the following para in that same article?
In principle, I'm all for a unified China. In practice, I think, that would lead to conflict with Japan, and/or proxy wars in the rest of SE Asia. Do you disagree?
(Score: 2) by Mojibake Tengu on Monday May 29 2023, @08:37PM (1 child)
I certainly do disagree. Japan definitely holds the same innate Logos as China. Both cultures are like twins, from ancient mythology, through literature, cults, medicine, cuisine, architecture, up to technology and art, everything is shared and intertwined, for more than two thousands of years.
As Dugin said in Noomachía: "If you do not grasp civilization Logos of your adversary, you are condemned to wage wars with him repeatedly forever". But that's not the problem for China and Japan. Or Korea.
They know and understand each other, predictably. Conflicts are possible, but they are not devastating to their Logos.
So. Unlike in Europe, there is objectively no local need for a total war in South East Asia for civilization dominance. Only ones who want induce something like this are Anglo-Saxons and Jews.
But, not only they do not grasp or understand, their own invasive Logos does not belong there either. They will not succeed in long term.
I bet on trade superiority over conquest. And on spiritual power of Azure Dragon of the East.
Respect Authorities. Know your social status. Woke responsibly.
(Score: 3, Insightful) by esperto123 on Monday May 29 2023, @10:59PM
I think Japan in late 19th/early 20th century would disagree with you, they had to go to pretty dark places to dominate east asia, similar cultures or not, and the largest conflict to date mostly happened mostly in europe, where, although there are several cultures, they are quite similar, mostly christian and for a long long time the head of states were close families, and that didn't avoid any wars.
(Score: 3, Interesting) by esperto123 on Monday May 29 2023, @10:53PM
yeah, in regards of the taiwan reacting to US destroing any target I don't think there is much they can do, not only because the US is a 800 pound gorilla in terms of military arsenal but that to completly disrupt TSMC production they don't need to bomb it, a few well placed talc sprays and a power outage and it is shutdown for months or years, and I doubt that they would be able to buy replacement equipment.
There would also be the high possibility of brain exfiltration, where you take out of the island (volutarily or by force) a high number of key personnel, and the factory wouldn't be able to run or be maintained, as, although very highly automated, these factories need very VERY specialized personnel to run properly.
(Score: 0) by Anonymous Coward on Tuesday May 30 2023, @01:11AM
Taiwan says a lot of stuff that it doesn't mean in attempts to preserve the status quo with West Taiwan.
When shit hits the fan, will it be TSMC's or Taiwan's decision to not blow up key TSMC facilities? Maybe not.
(Score: 4, Informative) by VLM on Monday May 29 2023, @04:11PM
And it proactively leverages their synergies
The article is light on the technology and heavy on the management buzzwords.
Something that's cool about electronics devices is the "successful" ones get cheap so anyone who wants a tunnel diode or a Gunnplexor diode can simply buy one cheap and F around with it so this hobby is right in my wheelhouse.
First, if you're not an EE but can use a multimeter in anger without blowing the fuse most of the time, a FET is a voltage controlled current passing switch. Turns out even with shitty last century tech we can make REALLY good ones where the control input has darn near infinite input impedance and the power its switching has darn near zero output impedance, at least compared to other transistor designs, etc. So they're kinda dominant in post 1970s era electronics. Have a few static electricity problems and a couple other interesting issues but FETs are pretty cool, sure. Old fashioned current-mode BJTs still rule the roost in both specialized tasks and "too cheap not to use a 1 cent IC" tasks.
In basic electronics class you probably got taught the trivial Planar FET topology as the only topo that exists, which IIRC Fairchild Semi invented in the 50s and is the stereotype people think of for "how ICs are made" (also transistors). Photolithography and act like making a 2-d printed circuit board but really tiny. So you got your source, drain, gate, made 1960 style. Uncountable number of trillions of these FET in motor controllers and switching power supplies and ICs out there in general. But, you got limits trying to push serious wattage efficiently thru nearly pure 2-d design. Its amazing that these work at all, in fact they work pretty well indeed, but really restricted design criteria.
Something more 3-d would work better. Generically any transistor thats not flat (planar) is a "finfet" but in practice a finFET is a 2-d planar transistor made more efficient by "wrapping" the source-drain channel with a single simple 3-d gate. Obviously you can stick more field into a channel from four sides than just thru the top only, no surprise if its quadruple the performance or a quarter the volume for the same performance. Also no surprise this is where it starts to become a nightmare to manufacture compared to 1950s era planar processes.
Well shit if its a huge PITA to build a massive 3-d gate and you got a signal going to more than one transistor, why not shove multiple drain-source channels thru THE SAME 3-D GATE. That's a GaaFET (not to be confused with gallium arsenide fet gaasfets are a whole nother thing having to do with electron mobility or some damn thing totally off topic). So take your "slice of bread" gate and shove a couple source-drain hotdogs thru it sideways, why not? Also note you can parallel them. So imagine you got four hotdogs sticking thru the bread slice. Back in the "bad old days" you could kick ass with a planar transistor that only "touches" the top of the channel, now you got four channels being touched on four sides thats sixteen times the field interaction this thing is going to be a F-ing nightmare to build but if you can do it the performance will be incredible.
You can kind of imagine the next step, that's this CFET geometry. So... instead of making, for the sake of argument, a big ass nFET channel and etching it into four mini-channels (probably wrong verbiage) and then embedding a gate around the four identical channels... what if... you could make whatever combo of arbitrary N and P type channels then wrap them with the gate? When people talk about "making 3-d chips" they don't know they're doing it, but what they're imagining, is stacking up arbitrary lego or minecraft blocks, that's this CFET thing. Put any combo of N and/or P type and shape "mini" channels thru the same gate. Cool!
I would imagine you could make a kick ass microwave power mixer using CFETs.
Messed up SN culinary analogy:
In the old days you made hot dog sandwiches using wonder bread and a panini press (Fairchild Semi Planar process circa 1959). Then they came up with the idea of the hot dog bun wrapping the wiener (thats a finFET). (LOL I just wanted to say wiener on SN). Then they came up with the "brilliant" idea of the double decker hot dog bun holding 2, 4, maybe 100 dogs in the same bun for low carb people I guess, better ratio of nutritious meat vs empty bread calories (thats a GaaFET). The final evolution of the concept was inventing a 'hot dog' bun that could hold any combination of hot dogs, brats, or any other wiener shaped object (snicker) (that's a CFET).
Yeah you're probably not buying anything from Digikey or Mouser with CFETs inside it any time soon. But someday, maybe, sure.