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Who Wants a Quad-Core 4.2GHz, 64GB, 5TB SSD RAID 10 … Laptop?

posted by martyb on Sunday February 07 2016, @09:15AM   Printer-friendly
from the prepare-to-drool dept.

Submitted by MrPlow on IRC for Bytram who writes:

The folks at Eurocom have released another monster 'mobile workstation'

This time around the company's released the Sky X9W complete with a quad-core, eight-thread, Intel Core i7 6700K capable of operating at 4.2GHz and nestled amidst an Intel Z170 Express (Skylake) chipset. The NVIDIA Quadro M5000M dwarfs the CPU for core count: it's got 1,536 of its own.

Pack in 64GB of DDR4-2133, 2400 or 2666 RAM, if you please, then throw in up to four NVME SSDs and give them the RAID 10 treatment for data protection.

There's also a 17.3 inch 4K screen at 3840 x 2160.

[... it also has] a single USB-C port, a pair of mini display ports capable of driving four monitors, an HDMI outlet, five USB 3.0 ports, a pair of RJ45s and Wi-Fi.

Configurations start at $2930 (and weigh in at 4.8 kg / 10.6 lbs — ouch!) , but you can configure it to a price well over $4000.

Source: http://www.theregister.co.uk/2016/02/05/eurcom_sky_x9w/

Original Submission

 
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  • (Score: 2) by takyon on Sunday February 07 2016, @01:25PM

    by takyon (881) <{takyon} {at} {soylentnews.org}> on Sunday February 07 2016, @01:25PM (#300176) Journal

    At some point in the future, 5 TB flash+ storage, 64 GB RAM, 4K screen, and a quad-core with matching integrated graphics will be found in a sub-$1000 1-2 kilogram laptop.

    Well, maybe. Multi-terabyte flash storage is easy, just expensive. Both NAND and post-NAND technologies are going 3D and will be able to pack many terabytes into 2.5" or smaller format. 16 GB DDR4 DIMMs are appearing, 32 GB will be around in the future. Two likely die shrinks, from 14nm to 10nm to 7nm, will increase the transistor budget for integrated graphics. 5nm or lower is anybody's guess, and the future of the CPU/GPU is looking like it will include a neuromorphic/machine learning companion. The holy grail of multilayer 3D stacking for transistors would add decades to Moore's law, and might even be a bad thing since it would reduce pressure to innovate and use lower powered neuromorphic chips.

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  • (Score: 2) by mhajicek on Sunday February 07 2016, @04:20PM

    by mhajicek (51) Subscriber Badge on Sunday February 07 2016, @04:20PM (#300225)

    Currently 3D stacking is limited by thermal dissipation. I'm hopeful for room temp superconductors and Photonics to help with that eventually. Imagine if none of your components required cooling.

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