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posted by cmn32480 on Wednesday March 23 2016, @03:27AM   Printer-friendly
from the hickory-dickory-dock dept.

Intel may finally be abandoning its "Tick-Tock" strategy:

As reported at The Motley Fool, Intel's latest 10-K / annual report filing would seem to suggest that the 'Tick-Tock' strategy of introducing a new lithographic process note in one product cycle (a 'tick') and then an upgraded microarchitecture the next product cycle (a 'tock') is going to fall by the wayside for the next two lithographic nodes at a minimum, to be replaced with a three element cycle known as 'Process-Architecture-Optimization'.

Intel's Tick-Tock strategy has been the bedrock of their microprocessor dominance of the last decade. Throughout the tenure, every other year Intel would upgrade their fabrication plants to be able to produce processors with a smaller feature set, improving die area, power consumption, and slight optimizations of the microarchitecture, and in the years between the upgrades would launch a new set of processors based on a wholly new (sometimes paradigm shifting) microarchitecture for large performance upgrades. However, due to the difficulty of implementing a 'tick', the ever decreasing process node size and complexity therein, as reported previously with 14nm and the introduction of Kaby Lake, Intel's latest filing would suggest that 10nm will follow a similar pattern as 14nm by introducing a third stage to the cadence.

Year Process Name Type
2016 14nm Kaby Lake Optimization
2017 10nm Cannonlake Process
2018 10nm Ice Lake Architecture
2019 10nm Tiger Lake Optimization
2020 7nm ??? Process

This suggests that 10nm "Cannonlake" chips will be released in 2017, followed by a new 10nm architecture in 2018 (tentatively named "Ice Lake"), optimization in 2019 (tentatively named "Tiger Lake"), and 7nm chips in 2020. This year's "optimization" will come in the form of "Kaby Lake", which could end up making underwhelming improvements such as slightly higher clock speeds, due to higher yields of the previously-nameed "Skylake" chips. To be fair, Kaby Lake will supposedly add the following features alongside any CPU performance tweaks:

Kaby Lake will add native USB 3.1 support, whereas Skylake motherboards require a third-party add-on chip in order to provide USB 3.1 ports. It will also feature a new graphics architecture to improve performance in 3D graphics and 4K video playback. Kaby Lake will add native HDCP 2.2 support. Kaby Lake will add full fixed function HEVC Main10/10-bit and VP9 10-bit hardware decoding.

Previously: Intel's "Tick-Tock" Strategy Stalls, 10nm Chips Delayed


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  • (Score: 2) by bitstream on Wednesday March 23 2016, @02:50PM

    by bitstream (6144) on Wednesday March 23 2016, @02:50PM (#322101) Journal

    1 transistor at 798 GHz and 4.3 kelvin.
    1 transistor at 417 GHz and 293 kelvin.
    10 000 000 transistors at 363 kelvin and at competitive price. Does it make it?

    Interesting transistor nevertheless.

    Starting Score:    1  point
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  • (Score: 0) by Anonymous Coward on Thursday March 24 2016, @10:07PM

    by Anonymous Coward on Thursday March 24 2016, @10:07PM (#322678)

    Ten million transistors is enough for a Pentium III. Modern processors have billions of transistors.

    https://commons.wikimedia.org/wiki/File:Transistor_Count_and_Moore%27s_Law_-_2011.svg [wikimedia.org]

    • (Score: 2) by bitstream on Saturday March 26 2016, @06:03PM

      by bitstream (6144) on Saturday March 26 2016, @06:03PM (#323357) Journal

      10 million is bottom limit to do any decent computing with the current demands. Given these incredible speeds and thus likely heat. It may in fact pay to reduce the number of transistors and have fewer but really fast ones. A speed gain of 100x will likely make consumers to accept that trade-off.

      (though external memory speed might be a serious bottleneck)