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Motherboard reports on a press release by the University of California Davis, where researchers designed a multiple instruction, multiple data (MIMD) microprocessor. Unlike a GPU, each core can run distinct instructions on distinct data.
According to the researchers the chip has a greater number of cores than any other "fabricated programmable many-core [chip]," exceeding the 336 cores of the Ambric Am2045, which was produced commercially.
IBM was commissioned to fabricate the processor in 32 nm partially depleted silicon-on-insulator (PD-SOI). It is claimed that the device can "process 115 billion instructions per second while dissipating only 1.3 watts." or, when operating at greater supply voltage and clock rate, "execute 1 trillion instructions/sec while dissipating 13.1 W."
(Score: 2) by HiThere on Wednesday June 22 2016, @08:25PM
I don't know. Shared Memory? in a parallel setup? Even if only one process is allowed to write to any particular section of memory you can get all sorts of races unless caching is eliminated, which has it's own problems. All shared memory needs to be immutable (write protected from every process) if you want to avoid that, and if you do that you're pretty much doing message passing even if the implementation looks different. Lock-based programming just doesn't scale well at all.
OTOH, I'm still getting started in this area, but the stories you hear!!
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