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posted by on Thursday April 20 2017, @10:46AM   Printer-friendly
from the breaking-news dept.

Submitted via IRC for TheMightyBuzzard

Or 2018 if you're brave. For now, we have a boot screen!

Story's a bit dated but being as they're in no rush, I don't see any need for us to be either. So, you lot think we'll ever actually get to play with a VMS box on cheap hardware or is this going to be another DNF situation?

Source: https://www.theregister.co.uk/2016/10/13/openvms_moves_slowly_towards_x86/

Previous coverage:
OpenVMS Not Yet Dead.


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  • (Score: 2) by TheRaven on Friday April 21 2017, @02:02PM (1 child)

    by TheRaven (270) on Friday April 21 2017, @02:02PM (#497399) Journal
    Intel Architecture Reference, Volume 3A, though it's not actually very explicit. Rings 1 and 2 are still technically there, but there's no mechanism for entering them when in IA32e mode, because the call gate mechanism depends on segments, which are gone in IA32e.
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  • (Score: 2) by NCommander on Friday April 21 2017, @11:59PM

    by NCommander (2) Subscriber Badge <michael@casadevall.pro> on Friday April 21 2017, @11:59PM (#497678) Homepage Journal

    Huh. I actually have found contradictory information when I went looking . Xen's security post suggests the IRET mechanism is there and the Priv spot is still present in the GDT selector. [xenproject.org]

    INT/IRET on 64-bit use the 64-bit IDT format which has a spot for the code selector in the GDT you can land in, and you can still setup multiple GDT entries in place. Won't having a specific entry in the GDT at Priv 1-2, and setting the sector via IDT give you an interrupt call which would pop you into the Ring 1-2?

    I may have to break out the assembler to experiment.

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