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Intel's Skylake and Kaby Lake CPUs Have Nasty Microcode Bug

posted by takyon on Monday June 26 2017, @09:35PM   
from the skylake-axed dept.

"exec" writes:

Arthur T Knackerbracket has found the following story:

During April and May, Intel started updating processor documentation with a new errata note, and over the weekend we learned why: Skylake and Kaby Lake silicon has a microcode bug.

The errata is described in detail on the Debian mailing list, and affects Skylake and Kaby Lake Intel Core processors (in desktop, high-end desktop, embedded and mobile platforms), Xeon v5 and v6 server processors, and some Pentium models.

The Debian advisory says affected users need to disable hyper-threading "immediately" in their BIOS or UEFI settings, because the processors can "dangerously misbehave when hyper-threading is enabled."

Symptoms can include "application and system misbehaviour, data corruption, and data loss".

Henrique de Moraes Holschuh, who authored the Debian post, notes that all operating systems, not only Linux, are subject to the bug.

Also at Tom's Hardware and Ars Technica.

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Original Submission

• Re:8-bit registers Re:8-bit registers (Score: 1, Informative) by Anonymous Coward on Tuesday June 27 2017, @09:40AM (1 child)

  by Anonymous Coward on Tuesday June 27 2017, @09:40AM (#531831)

  From the description, emphasis by me:

  Problem: Under complex micro-architectural conditions, short loops
                  of less than 64 instructions that use AH, BH, CH or DH
                  registers as well as their corresponding wider register
                  (e.g. RAX, EAX or AX for AH) may cause unpredictable
                  system behavior. This can only happen when both logical
                  processors on the same physical processor are active.

  I cannot imagine any 64 bit code that doesn't use RAX, RBX, RCX or RDX, nor any 32 bit code that doesn't use EAX, EBX, ECX or EDX.

  Parent

  Starting Score:	0		points
  Moderation		+1
  Informative=1, Total=1
  Extra 'Informative' Modifier		0
  Total Score:		1

• Re:8-bit registers (Score: 2) by Dr Spin on Tuesday June 27 2017, @02:24PM

  by Dr Spin (5239) on Tuesday June 27 2017, @02:24PM (#531912)

  The way I understood this, the bug is tripped when you use the 8 bit reg in one thread and the extended reg
  in another thread.

  Have I read it wrong?

  (I read the OpenBSD description, but on a phone, without my glasses).

  I suggest that this is more evidence that a monoculture is high risk. I can't wait to see Arm servers able
  to compete on performance in the "8 to 64 thread" market. It would be nice to see greater diversity in
  memory interfaces too.

  --
  Warning: Opening your mouth may invalidate your brain!

  Parent