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posted by takyon on Saturday September 23 2017, @04:13AM   Printer-friendly
from the wishful-thinking dept.

From the lowRISC blog:

We are looking for a talented hardware engineer to join the lowRISC team and help make our vision for an open source, secure, and flexible SoC a reality. Apply now!

lowRISC C.I.C. is a not-for-profit company that aims to demonstrate, promote and support the use of open-source hardware. The lowRISC project was established in 2014 with the aim of bringing the benefits of open-source to the hardware world. It is working to do this by producing a high quality, secure, open, and flexible System-on-Chip (SoC) platform. lowRISC C.I.C. also provides hardware and software services to support the growing RISC-V ecosystem. Our expertise includes the LLVM Compiler, hardware security extensions and RISC-V tools, hardware and processor design.

[...] lowRISC is an ambitious project with a small core team, so you will be heavily involved in the project's development direction. This role will involve frequent work with external contributors and collaborators. While much of the work will be at the hardware level the post will offer experience of the full hardware/software stack, higher-level simulation tools and architectural design issues.

Some practical experience of hardware design with a HDL such as Verilog/SystemVerilog is essential, as is a good knowledge of the HW/SW stack. Ideally, candidates will also have experience or demonstrated interest in some of: SoC design, large-scale open source development, hardware or software security, technical documentation, board support package development and driver development. Industrial experience and higher degree levels are valued, but we would be happy to consider an enthusiastic recent graduate with a strong academic record.

Informal enquires should be made to Alex Bradbury asb@lowrisc.org.

takyon (thanks to an AC): lowRISC is a project to create a "fully open-sourced, Linux-capable, system-on-a-chip"; it is based around RISC-V, the "Free and Open RISC Instruction Set Architecture", which is meant to provide an extensible platform that scales from low-level microcontrollers up to highly parallel, high-bandwidth general-purpose supercomputers.

Reduced instruction set computer (RISC).

Previously: RISC-V Projects to Collaborate
LowRISC Announces its 0.4 Milestone Release
SiFive and UltraSoC Partner to Accelerate RISC-V Development Through DesignShare


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  • (Score: 1) by anubi on Monday September 25 2017, @10:43AM (1 child)

    by anubi (2828) on Monday September 25 2017, @10:43AM (#572613) Journal

    I can't quite figure out why anything between the 8051 and 386SX survived.

    To me, the 8051 series is ideal for embedded stuff - when cost per device is important, but the devices aren't very complex.

    I thought the 8086 was barely OK, I hated the 80286 and its segmentation registers, and I sneered at the architecture until the 386SX finally arrived with again a nice contiguous memory accessing scheme, which was what I had all along with the 68HC000.

    Personally, I am highly into Arduino, as most of my stuff is cost-sensitive and not terribly complex. I like the Parallax Propeller series with its eight core chips as I/O, but I am afraid to design it into industrial stuff as I fear one day Parallax may stop making them, and as neat as they are, they are not second sourced and they haven't caught on as much as I would like to see.

    Those Propeller chips are extremely powerful if one has real-time processes to manage... for instance HobbyTronix has some VGA controllers built with them, and I am interested to see if I can convert them to run from the I2C bus instead of the serial bus. I also see it should be possible to run three independent VGA displays from one chip... that would be quite useful to me in making online diagnostic and reporting tools to let me observe a plant controller without bringing in a mess of diagnostic equipment... rather the propeller hung on the I2C would spew out info like an OBD-II reader does for a car.

    And not tie up any more of my precious I/O lines...

    --
    "Prove all things; hold fast that which is good." [KJV: I Thessalonians 5:21]
  • (Score: 2) by bzipitidoo on Monday September 25 2017, @03:51PM

    by bzipitidoo (4388) on Monday September 25 2017, @03:51PM (#572694) Journal

    Yes, you're right, but I'd skip the 386 as well. If you ever target the x86, go for the 486 as the base, or just use the 8086. The big lack in the 386, as I learned from others, is that it has no atomic test and set instruction. It can be worked around, but it's a lot more painful to implement semaphores and other such parallel and OS functionality on a 386. It's no accident that the Linux kernel maintainers dropped support for the 386 just a few years ago. The 286's support for multitasking OSes is even worse. Took Intel far too long to get that right-- should've got it right in the 286, instead of bungling it like they did for that iteration and for the 386.