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posted by takyon on Saturday April 28 2018, @11:29PM   Printer-friendly
from the decadeometer dept.

Intel on Thursday announced that it would delay mass production of its 10 nm processors from 2018 to 2019 due to yield issues. The company has claimed to be shipping some of its 10 nm chips in small volumes right now, but due to cost reasons the firm does not intend to initiate their high-volume manufacturing (HVM) at this time. Intel executives also stated that they are confident of their product roadmap and intend to launch Whiskey Lake and Cascade Lake products later this year.

[...] Intel blames a very high transistor density and consequent heavy use of multipatterning for low yields. Brian Krzanich has said that in certain cases the company needs to use quad (4x), penta (5x), or hexa (6x) patterning for select features as they need to expose the wafer up to six times to "draw" one feature. This not only lengthens Intel's manufacturing cycle (which by definition rises costs) and the number of masks it uses, but also has an effect on yields.

Intel's 10 nm fabrication technology relies solely on deep ultraviolet (DUV) lithography with lasers operating on a 193 nm wavelength at this time. The company's 7 nm manufacturing process will use extreme ultraviolet (EUV) lithography with laser wavelength of 13.5 nm for select layers, eliminating use of extreme multipatterning for certain metal layers. As it appears, right now Intel executives do not consider EUV technology ready for prime time in 2019, so the company's engineers have to polish off the last DUV-only process (again) rather than jump straight to 7 nm.

The delay means another generation of "14nm" products:

Intel does not elaborate whether it intends to ship (in volume) its 10 nm CPUs in the first half or the second half of 2019, but only says that the company’s engineers know the source of the yield problems and are working hard to fix them. As a result, it is pretty safe to assume that the actual ramp of Intel’s 10 nm production will begin towards the second half of next year.

In a bid to stay competitive before its 10-nm CPUs ship in the H2 2019 – H1 2020 (production ramp takes time, bigger processors will launch later than smaller parts), Intel plans to release another generation of products made using its 14 nm process tech. This generation of chips includes Whiskey Lake products for client PCs and Cascade Lake for the datacenter, and both are scheduled for release later this year.

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  • (Score: 2) by takyon on Sunday April 29 2018, @12:33AM (2 children)

    by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Sunday April 29 2018, @12:33AM (#673187) Journal
    Starting Score:    1  point
    Karma-Bonus Modifier   +1  

    Total Score:   2  
  • (Score: 1) by Ethanol-fueled on Sunday April 29 2018, @02:58AM (1 child)

    by Ethanol-fueled (2792) on Sunday April 29 2018, @02:58AM (#673222) Homepage

    You'd never think at first glance the "dick size debate" would be about smaller, not bigger.

    Anyway, you knew this already, but at those dimensions things like leakage current really take their toll on design. Well, good for them. I'll sit on my fat 50nm ass and wait for all the i̶d̶i̶o̶t̶s̶ first-adopters to pay extra money to fund the research.

    • (Score: 3, Informative) by takyon on Sunday April 29 2018, @03:18AM

      by takyon (881) <reversethis-{gro ... s} {ta} {noykat}> on Sunday April 29 2018, @03:18AM (#673229) Journal

      Something like this [] will probably solve the leakage problem. They will get whipped out only when the last $$$ have been squeezed out from current finFET/gate-all-around [] transistors, apparently going down to as low as "3nm" [] or even "1.5nm" [].

      There is competition in the market even if AMD burns out: x86 vs. ARM. So eventually they will figure out TFETs or whatever is necessary to either boost clock speeds again or stack cores in order to reach core counts in the hundreds or thousands.

      [SIG] 10/28/2017: Soylent Upgrade v14 []