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posted by Fnord666 on Friday December 14 2018, @01:55AM   Printer-friendly
from the latest-and-greatest dept.

Intel has announced new developments at its Architecture Day 2018:

Sunny Cove, built on 10nm, will come to market in 2019 and offer increased single-threaded performance, new instructions, and 'improved scalability'. Intel went into more detail about the Sunny Cove microarchitecture, which is in the next part of this article. To avoid doubt, Sunny Cove will have AVX-512. We believe that these cores, when paired with Gen11 graphics, will be called Ice Lake.

Willow Cove looks like it will be a 2020 core design, most likely also on 10nm. Intel lists the highlights here as a cache redesign (which might mean L1/L2 adjustments), new transistor optimizations (manufacturing based), and additional security features, likely referring to further enhancements from new classes of side-channel attacks. Golden Cove rounds out the trio, and is firmly in that 2021 segment in the graph. Process node here is a question mark, but we're likely to see it on 10nm and or 7nm. Golden Cove is where Intel adds another slice of the serious pie onto its plate, with an increase in single threaded performance, a focus on AI performance, and potential networking and AI additions to the core design. Security features also look like they get a boost.

Intel says that GT2 Gen11 integrated graphics with 64 execution units will reach 1 teraflops of performance. It compared the graphics solution to previous-generation GT2 graphics with 24 execution units, but did not mention Iris Plus Graphics GT3e, which already reached around 800-900 gigaflops with 48 execution units. The GPU will support Adaptive Sync, which is the standardized version of AMD's FreeSync, enabling variable refresh rates over DisplayPort and reducing screen tearing.

Intel's upcoming discrete graphics cards, planned for release around 2020, will be branded Xe. Xe will cover configurations from integrated and entry-level cards all the way up to datacenter-oriented products.

Like AMD, Intel will also organize cores into "chiplets". But it also announced FOVEROS, a 3D packaging technology that will allow it to mix chips from different process nodes, stack DRAM on top of components, etc. A related development is Intel's demonstration of "hybrid x86" CPUs. Like ARM's big.LITTLE and DynamIQ heterogeneous computing architectures, Intel can combine its large "Core" with smaller Atom cores. In fact, it created a 12mm×12mm×1mm SoC (compare to a dime coin which has a radius of 17.91mm and thickness of 1.35mm) with a single "Sunny Cove" core, four Atom cores, Gen11 graphics, and just 2 mW of standby power draw.


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  • (Score: 2) by takyon on Friday December 14 2018, @07:07PM (3 children)

    by takyon (881) <takyonNO@SPAMsoylentnews.org> on Friday December 14 2018, @07:07PM (#774516) Journal

    Chicken, meet egg. Or vice versa. With core counts reaching 16 for mainstream CPUs, someone will come up with software that can take advantage of it. And don't say "bloat will do it!" because you actually have to try to waste those resources.

    I wish you luck on stretching to Ryzen 4 or 5. Maybe you can hold out until the "5nm" node for some extra gains. If you get an APU or GPU, make sure it comes with AV1 hardware decoding.

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  • (Score: 2) by jasassin on Friday December 14 2018, @11:41PM (2 children)

    by jasassin (3566) <jasassin@gmail.com> on Friday December 14 2018, @11:41PM (#774602) Homepage Journal

    If you get an APU or GPU, make sure it comes with AV1 hardware decoding.

    This reminds me of the hardware h.264 in my GPU. I don't know if there are any programs that support it even now. I wouldn't be surprised if it took years before any software supports the AV1 hardware decoding.

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