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In a press release, Wave Computing has announced that the MIPS ISA will be opening up and will be free of any licensing or royalty fees with full access to its patents. This announcement covers both the 32-bit and 64-bit versions. MIPS is a reduced instruction set computer (RISC) instruction set architecture (ISA) often used in embedded systems, but has been originally designed for general purpose computing. Since 2000, an estimated 8.5 billion CPUs with MIPS cores have been shipped, by a broad range of companies. The goal of this change is for participants using MIPS to promote the architectue through providing full access to the most recent versions of the 32-bit and 64-bit MIPS ISA free of charge. The program, called MIPS Open program, will be cover hundreds of MIPS' patents, with no licensing or royalty fees.
See also:
Liliputing : MIPS chip architecture is going open source
EE Times : MIPS Goes Open Source
Phoronix : MIPS Processor ISA To Be Open-Sourced In 2019
(Score: 0) by Anonymous Coward on Tuesday December 18 2018, @03:58PM (1 child)
I need some specifics for my daydreaming. How much money would I have to aquire to have my chip produced at a Fab?
(Score: 4, Informative) by takyon on Tuesday December 18 2018, @04:08PM
https://electronics.stackexchange.com/questions/7042/how-much-does-it-cost-to-have-a-custom-asic-made [stackexchange.com]
https://en.wikipedia.org/wiki/Application-specific_integrated_circuit [wikipedia.org]
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 4, Insightful) by bzipitidoo on Tuesday December 18 2018, @04:28PM (5 children)
In the 1980s, the PC was the most open computer. PC clones were everywhere.
In contrast, Apple jealously guarded their intellectual "properties" as if those ideas were gold. Others weren't any better. The Commodore Amiga was proprietary to the hilt. Commodore died and Apple declined to 5% market share and looked like they might die too, before recovering. Motorola had good CPUs, but they lost out to Intel.
There's a lesson in all this, but what that lesson is seems hard to figure. Can't clearly say that openness wins, but that sure looks like the chief takeaway.
(Score: 0) by Anonymous Coward on Tuesday December 18 2018, @04:47PM (4 children)
Tell me, what was open about Intel's x86 CPUs?
(Score: 0) by Anonymous Coward on Tuesday December 18 2018, @05:03PM (1 child)
what does that have to do with what the op said? the op listed computing platform vendors not cpu vendors...
(Score: 0) by Anonymous Coward on Tuesday December 18 2018, @07:43PM
The article is about open sourcing a CPU instruction set.
Tell me who is on topic...
(Score: 3, Informative) by maxwell demon on Tuesday December 18 2018, @05:13PM
He said "most open", not "completely open". Obviously the PC's processor design was not open (nor was the standard OS delivered with it). Anyway, arguably the x86 design was more open in the sense that at least one other company had an official license to use the design for making processor clones (that was a condition IBM put on Intel in order to use the processors in the PC).
The Tao of math: The numbers you can count are not the real numbers.
(Score: 0) by Anonymous Coward on Tuesday December 18 2018, @10:50PM
I could get clones from NEC, Cyrix, AMD etc.
(Score: 0) by Anonymous Coward on Tuesday December 18 2018, @05:09PM
i guess it took riscV to do it first for mips peeps to see the writing on the wall/prove the viability, but better late than never i guess. maybe if open embedded stuff takes off, the pointy hairs at intel and amd will put a couple lunches towards planning how to open up some. hopefully open power will be successful and that could put some pressure on them.
(Score: 0) by Anonymous Coward on Tuesday December 18 2018, @06:48PM (1 child)
isn't MIPS the rolls-royce of networking gear? ARM being the high bred race horse, that does laps in lightning speed but fails at everything else?
(Score: 0) by Anonymous Coward on Tuesday December 18 2018, @07:30PM
I don't know, but my old Playstations have a MIPS R3000.
(Score: 1) by jrbrtsn on Wednesday December 19 2018, @01:39PM
IIRC MIPS are "big endian" processors, which is the convention of numbers in TCP headers, and so avoids the need shuffle bytes when interpreting those headers.