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from the when-will-we-need-to-start-miniaturizing-molecules? dept.
TSMC[*] this week said that it has completed development of tools required for design of SoCs that are made using its 5 nm (CLN5FF, N5) fabrication technology. The company indicated that some of its alpha customers (which use pre-production tools and custom designs) had already started risk production of their chips using its N5 manufacturing process, which essentially means that the technology is on-track for high-volume manufacturing (HVM) in 2020.
TSMC's N5 is the company's 2nd generation fabrication technology that uses both deep ultraviolet (DUV) as well as extreme ultraviolet (EUV) lithography. The process can use EUVL on up to 14 layers (a tangible progress from N7+, which uses EUVL on four non-critical layers) to enable significant improvements in terms of density. TSMC says that when compared to N7 (1st Gen 7 nm, DUV-only), N5 technology will allow chip developers to shrink die area of their designs by ~45%, making transistor density ~1.8x higher. It will also increase frequency by 15% (at the same complexity and power) or reduce power consumption by 20% power reduction (at the same frequency and complexity).
[*] TSMC - Taiwan Semiconductor Manufacturing Corporation
Same chip(let) size? Approximately double the core count.
Previously: TSMC Holds Groundbreaking Ceremony for "5nm" Fab, Production to Begin in 2020
TSMC Details Scaling/Performance Gains Expected From "5nm CLN5" Process
TSMC Tapes Out Second-Generation "7nm" Chip Using EUV, Will Begin Risk Production of "5nm" in April
Related: Samsung Plans to Make "5nm" Chips Starting in 2019-2020
ASML Plans to Ship 30 Extreme Ultraviolet Lithography (EUV) Scanners in 2019
(Score: 2) by takyon on Sunday April 07 2019, @03:43AM
As stated, the number is not meaningful, particularly when comparing between Intel, Samsung, TSMC, etc.
Just think of Intel 14nm++++ as "Intel A v5", Intel 10nm as "Intel B v1". The numbers are just labels. Then you can find the stats to compare various processes. TSMC's 7FF+ supposedly will use 90% of the power of TSMC 7FF, for about the same performance, and 83% of the area for the same amount of transistors. TSMC 5FF is 80% power, 115% performance, and 55% of the area compared to TSMC 7FF. So 5FF should be about 89% power, 115% perf, and 66% area of 7FF+.
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