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Cerebras Systems' Wafer Scale Engine Deployed at Argonne National Labs

posted by martyb on Monday November 25 2019, @05:21AM   Printer-friendly
from the what-will-they-think-of-next dept.

takyon writes:

Cerebras Unveils First Installation of Its AI Supercomputer at Argonne National Labs

At Supercomputing 2019 in Denver, Colo., Cerebras Systems unveiled the computer powered by the world's biggest chip. Cerebras says the computer, the CS-1, has the equivalent machine learning capabilities of hundreds of racks worth of GPU-based computers consuming hundreds of kilowatts, but it takes up only one-third of a standard rack and consumes about 17 kW. Argonne National Labs, future home of what's expected to be the United States' first exascale supercomputer, says it has already deployed a CS-1. Argonne is one of two announced U.S. National Laboratories customers for Cerebras, the other being Lawrence Livermore National Laboratory.

The system "is the fastest AI computer," says CEO and cofounder Andrew Feldman. He compared it with Google's TPU clusters (the 2nd of three generations of that company's AI computers), noting that one of those "takes 10 racks and over 100 kilowatts to deliver a third of the performance of a single [CS-1] box."

The CS-1 is designed to speed the training of novel and large neural networks, a process that can take weeks or longer. Powered by a 400,000-core, 1-trillion-transistor wafer-scale processor chip, the CS-1 should collapse that task to minutes or even seconds. However, Cerebras did not provide data showing this performance in terms of standard AI benchmarks such as the new MLPerf standards. Instead it has been wooing potential customers by having them train their own neural network models on machines at Cerebras.

[...] The CS-1's first application is in predicting cancer drug response as part of a U.S. Department of Energy and National Cancer Institute collaboration. It is also being used to help understand the behavior of colliding black holes and the gravitational waves they produce. A previous instance of that problem required 1024 out of 4392 nodes of the Theta supercomputer.

Also at TechCrunch, VentureBeat, and Wccftech.

Previously: Cerebras "Wafer Scale Engine" Has 1.2 Trillion Transistors, 400,000 Cores

Original Submission

 
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  • (Score: 2) by c0lo on Monday November 25 2019, @06:15AM (4 children)

    by c0lo (156) on Monday November 25 2019, @06:15AM (#924422) Journal

    1. ... but does it run Linux?
    2. Imagine a Beowulf cluster of these

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    https://www.youtube.com/watch?v=aoFiw2jMy-0

    • (Score: 0) by Anonymous Coward on Monday November 25 2019, @06:19AM

      by Anonymous Coward on Monday November 25 2019, @06:19AM (#924424)

      It found Linux too difficult to operate.

    • (Score: 3, Interesting) by takyon on Monday November 25 2019, @06:20AM (2 children)

      by takyon (881) <takyonNO@SPAMsoylentnews.org> on Monday November 25 2019, @06:20AM (#924425) Journal

      The software can perform that optimization problem across multiple computers, allowing a cluster of computers to act as one big machine. Cerebras has linked as many as 32 CS-1s together to get a roughly 32-fold performance increase. This is in contrast with the behavior of GPU-based clusters, says Feldman. “Today, when you cluster GPUs, you don't get the behavior of one big machine. You get the behavior of lots of little machines.”

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  • (Score: 3, Interesting) by KritonK on Monday November 25 2019, @07:51AM

    by KritonK (465) on Monday November 25 2019, @07:51AM (#924440)

    I wonder if the chip's first application is going to be to mine enough bitcoins to pay the cost of its development.

  • (Score: 2) by crafoo on Monday November 25 2019, @08:13PM (1 child)

    by crafoo (6639) on Monday November 25 2019, @08:13PM (#924619)

    I don't have much to add besides this is super cool. I wonder what the defect rate is for a wafer-sized CPU. Also, what sized wafer? 4", 6", 8", 12", ...? Back when I was in the semiconductor industry, we used 4", 6,", and 12" depending on the wafer material and doping. I wonder if they have some new clean room tech too, or just accept a high defect rate.

    • (Score: 2) by takyon on Monday November 25 2019, @09:10PM

      by takyon (881) <takyonNO@SPAMsoylentnews.org> on Monday November 25 2019, @09:10PM (#924638) Journal

      If you look at the previous reporting on this, the Wafer Scale Engine is defect tolerant.

      Wafers incur defects when circuits are burned into them, and those areas become unusable. Nvidia, Intel, and other makers of “normal” smaller chips can get around that by cutting out the good chips in a wafer and scrapping the rest. You can’t do that if the entire wafer is the chip. So Cerebras had to build in redundant circuits, to route around defects in order to still deliver 400,000 working cores, like a miniature internet that keeps going when individual server computers go down. The wafers were produced in partnership with Taiwan Semiconductor Manufacturing, the world’s largest chip manufacturer, but Cerebras has exclusive rights to the intellectual property that makes the process possible.

      It is using a 300mm wafer and TSMC "16nm" node. Defect rate should be pretty low? Since that's a mature node at this point.

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      [SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
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