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posted by martyb on Friday August 07 2020, @06:29AM   Printer-friendly
from the intel-on-Intel dept.

What's wrong with Intel, and how to fix it: Former principal engineer unloads (archive)

In a blunt video posted late Thursday evening, outspoken former Intel principal engineer Francois Pidnoel offered his advice on how to "fix" Intel CPUs, criticized current leadership for not being engineers, said AVX512 was a misadventure, and declared that it's only luck AMD hasn't grabbed more market share.

"First, Intel is really out of focus," Piednoel said in the nearly hour-long video presentation. "The leaders of Intel today are not engineers, they are not people who understand what to design to the market."

[...] Pidnoel flat-out dismissed including AVX512 in consumer chips as a mistake. "You had Skylake and Skylake X for a reason," Piednoel said. "AVX512 is designed for a race of throughput that is lost to the GPU already. There's two ways to get throughput. One is to get the throughput is by having larger vectors to your core, and the other way is to have more cores."

[...] "Intel is very lucky AMD cannot get the volume, to be able to compete," Piednoel. "If they were getting volume, the price difference would definitely cost Intel market share a lot more than what they are losing right now."

Related: AVX-512: A "Hidden Gem"?
Intel CEO Blames "10nm" Delays on Aggressive Density Target, Promises "7nm" for 2021
Intel's Process Nodes Will Trail Behind Competitors Until at Least Late 2021
Linus Torvalds: Don't Hide Rust in Linux Kernel; Death to AVX-512
Intel Engineering Chief Out After 7nm Product Delays
Intel Faces Class-Action Lawsuit Over "7nm" Delays

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  • (Score: 3, Interesting) by RamiK on Friday August 07 2020, @09:35AM

    by RamiK (1813) on Friday August 07 2020, @09:35AM (#1032805)

    Looking at the scope, the leak seems to be the ODMs' "support package" for putting together motherboards' firmwares and such so it's not something that they didn't expect AMD and friends getting their hands on it so there shouldn't be any problems there beyond the odd security vulnerability that will get patched eventually. Similarly, the new vulnerability is really just another issue in a long line of issues that will get addressed by microcode and/or software so they'll just brush it off like usual.

    Besides, my too-late isn't just about that: While MBAs making mistakes is part of the problem, Intel keeping AVX512 for so long while going into GPUs is likely due to them realizing they can't balance hyper-threading, SMT and single-threaded the way he suggests since speculative execution redesigns ate away at the relevant optimizations. So, the only way for them to address the market demand for those loads (without giving it all up to nVidia) is to make their own discrete GPU dies and glue a few of them into the Xeons a few years down the line instead of the vector instructions once nVidia's current gamble on ray tracing and AI ends up trivialized like Ageia's PhysX. Also, as I've said on other posts, single-threaded performance just doesn't matter that much for consumers since the GPU is the bottleneck anyhow.

    So, those points he's making now and that we've been raising for years aren't wrong and will improve things if addressed immediately in the short term but they no longer fully address Intel's long term concerns in the consumer market where single threaded performance is either irrelevant or bottlenecked by the GPU, the HPC market where GPUs handle the loads better than the AVX512, or the VM market where the AVX512 costs them 10% die space. They only partially address the latter and that's assuming AMD can't match them with the new Zen on single-threaded.

    Overall, too late.

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