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posted by Fnord666 on Saturday August 29 2020, @02:08AM   Printer-friendly
from the smaller-and-smaller dept.

Taiwan Semiconductor Manufacturing Company (TSMC) announced a number of node scaling details and technological advancements at its 2020 Technology Symposium:

TSMC's first "5nm" node (N5) has a lower defect rate than its initial "7nm" node did at the same point in its development cycle (high volume manufacturing, which N5 is now in). This is due in part to increasing use of extreme ultraviolet lithography (EUV). "5nm" will represent 11% of TSMC's sub-"16nm" wafer production in 2020.

TSMC's "3nm" node (N3) will continue to use FinFETs rather than gate-all-around (GAA) transistors, and is scheduled for volume production in mid-late 2022. Performance is expected to improve 10-15% at the same power (compared to N5), or power consumption will be reduced 25-30% for the same performance. Logic area density improvement will be 1.7x, but SRAM density will only increase by 1.2x, leading to a 1.27x overall density increase for chips that are 70% SRAM and 30% logic.

Intel's EMIB (Embedded Die Interconnect Bridge) connects "chiplets" together without using a full silicon interposer. TSMC has its own version that it is calling Local Si Interconnect (LSI), and it will be combined with other packaging technologies. TSMC has demonstrated 12-layer stacking of chips using through silicon vias (TSVs), although cooling or doing anything useful with them could be somebody else's job.

See also: TSMC Updates on Node Availability Beyond Logic: Analog, HV, Sensors, RF
TSMC Launches New N12e Process: FinFET at 0.4V for IoT
2023 Interposers: TSMC Hints at 3400mm2 + 12x HBM in one Package
TSMC and Graphcore Prepare for AI Acceleration on 3nm
TSMC Has Reportedly Secured Orders for Its 2nm Node – Samsung May Not Beat Its Foundry Rival Until 2030, Claims New Report

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  • (Score: 3, Interesting) by jasassin on Saturday August 29 2020, @05:55AM (2 children)

    by jasassin (3566) <> on Saturday August 29 2020, @05:55AM (#1043670) Journal

    Extreme Ultraviolet lithography.

    I understand the concept of smaller spectrum of light, but I don't understand the mechanism that controlls the light more accurately than the size of the particle wave itself. In my mind it's like a chicken and the egg conundrum.

    -- Key fingerprint = 0644 173D 8EED AB73 C2A6 B363 8A70 579B B6A7 02CA
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  • (Score: 4, Informative) by Mojibake Tengu on Saturday August 29 2020, @06:30AM (1 child)

    by Mojibake Tengu (8598) Subscriber Badge on Saturday August 29 2020, @06:30AM (#1043679) Journal

    It's about stochastic blur control: []

    The edge of 太玄 cannot be defined, for it is beyond every aspect of design
    • (Score: 4, Touché) by jasassin on Saturday August 29 2020, @07:25AM

      by jasassin (3566) <> on Saturday August 29 2020, @07:25AM (#1043695) Journal

      Thanks for the link and reference to stochasm.

      It's about stochastic blur control

      After reading that and not understanding 95% of it, I'll just bow out of this articles comments and take a few aspirin.

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