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takyon writes:

AMD patents a task transition method between BIG and LITTLE processors

The next decade will no longer be dictated by the number of cores, but rather the processor's fabrication node, packaging method, and power efficiency. A big role will also be played by heterogeneous architectures.

Later this year Intel will launch its 12th Gen Core Alder Lake processors for desktop and mobile systems. This is not the first architecture to implement Intel's Hybrid Technology (the first was Lakefield). This is a marketing term for high-efficiency (small) and high-performance (big) core implementation. Most tech users should be more familiar with the term big.LITTLE, which is actually an old name for ARM's heterogeneous computing architecture, now replaced by DynamIQ.

While heterogeneous CPUs have been used in mobile devices for years, this technology isn't exactly a domain of modern desktop PCs, where power efficiency is not exactly the biggest concern. The next-generation Windows operating system is rumored to feature a new task scheduling method for such heterogeneous computing, which might just align with Intel's Alder Lake launch.

While AMD has not really confirmed it is working on such [a] processor design, the leaks have brought us a new codename 'Strix Point', which is associated with [a] Zen5 based APU, supposedly also featuring smaller cores known as Zen4D. The latter is a codename of the smaller core.

Just two days ago, an AMD patent on 'task transition between heterogeneous processors' has been published. This patent was originally filed in December 2019, which suggests AMD has clearly been working on this technology for a long time. The patent covers the most important engineering problem of heterogeneous computing, which is how to schedule or transition tasks between different types of cores.

It looks like both Intel and AMD will adopt heterogeneous x86 microarchitectures in future desktop and mobile processors. Smaller cores can deliver better performance-per-Watt and performance-per-mm² of die area, allowing for greater potential gains in multi-threaded performance, while big cores deliver better single-thread performance.

Intel's Alder Lake desktop CPUs will have up to 8 big and 8 small cores, and are expected to be announced or launched around October 25. It will support both DDR4 and DDR5 memory depending on the motherboard used. Intel is rumored to follow that up with Raptor Lake CPUs in 2022 featuring 8 big and 16 small cores.

The rumored AMD Strix Point APUs could launch as late as 2024, with a mix of Zen 5 (big) and "Zen 4D" (small) cores on TSMC's "3nm" process.

Also at Tom's Hardware.

Previously: Intel Architecture Day 2020: Tiger Lake, Alder Lake, Discrete GPUs, and More

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