SoylentNews is people
SoylentNews
http://www.e-basteln.de/computing/65f02/65f02/
The 6502 was the CPU in my first computer (an Apple II plus), as well as many other popular home computers of the late 1970s and 80s. It lived on well into the 1990s in game consoles and chess computers, mostly in its updated “65C02” CMOS version. Here’s a re-implementation of the 65C02 in an FPGA, in a pin-compatible format that lets you upgrade those old computers and games to 100 MHz clock rate!
The concept
The idea of implementing a CPU core inside an FPGA is not new, of course. In fact, the CPU core I am using is not my own, but was developed as a 6502 core by Arlet Ottens, and extended to cover the 65C02 opcodes by Ed Spittles and David Banks. A big thank-you to Arlet, Ed, and Dave for developing the core and sharing it freely! Links to their original work are on the Files & Links page.
(Score: 2) by shortscreen on Thursday October 14 2021, @02:25PM (1 child)
The XC6SLX9 FPGA has 576K bits of internal "block RAM" which is SRAM. I don't know the speed rating on that chip, but on Cyclone IVs you can push the internal RAM up to a few hundred MHz, so that should be fast enough to both initiate and complete a memory access during one 100MHz clock period.
(Score: 2) by ChrisMaple on Friday October 15 2021, @06:59PM
Using internal FPGA RAM sounds like a good strategy. If using external RAM is necessary, 10 ns devices are available from Cypress that are much larger than a 6502 can access all of. At worst, 1 wait state would be needed for memory access cycles.
Going with a state-of-the-art ASIC, standard cell or full custom or whatever, could push 6502 speeds to many 100s of MHz. Fun idea, but the logic of a 6502 CPU would be so small that it would be wasteful not to add other capabilities.