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posted by martyb on Friday December 03 2021, @11:32AM   Printer-friendly

SiFive Details New Performance P650 RISC-V Core

SiFive's Performance P650 licenseable processor IP core will debut to lead partners in Q1'2022 while the general availability is expected in "summer" 2022. Whether the Performance P650 will make its way into any public SiFive developer boards or the like remain unknown, but hopefully they will come out next year with some performant successor to the HiFive Unmatched.

This successor to their Performance P550 is expected to be the fastest RISC-V processor IP core on the market. Over the P550 should be around a 40% performance increase per-clock cycle. Overall there should be around a 50% performance gain over the P550. SiFive is reporting the Performance P650 will be faster than the Arm Cortex-A77.

SiFive Performance P650 RISC-V core to outperform Arm Cortex-A77 performance per mm2

Building upon the Performance P550 design, the SiFive Performance P650 is scalable to sixteen cores using a coherent multicore complex, and delivers a 40% performance increase per clock cycle based on SiFive engineering estimated performance in SPECInt2006/GHz, thanks to an expansion of the processor's instruction-issue width. The company compares P650 to the Arm family by saying it "maintains a significant performance-per-area advantage compared to the Arm Cortex-A77".

Other architecture enhancements over the previous generation include a higher maximum clock frequency (Liliputing says up to 3.5 GHz), platform-level memory management, interrupt control units, and support for the new RISC-V hypervisor extension for virtualization.

ARM Cortex-A77.

Previously: Intel Will License SiFive's New P550 RISC-V Core
SiFive Teases Fast New RISC-V Processor Core; Intel Acquisition Attempt Failed


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  • (Score: 1, Insightful) by Anonymous Coward on Friday December 03 2021, @05:19PM (8 children)

    by Anonymous Coward on Friday December 03 2021, @05:19PM (#1201862)

    if it cannot run a VANILLA arch-riscV linux it's goin straight to the can, 'cause it's just a consumer hostile repeat of the ARM story... which should just be renamed "drop-the-microphone-for-profit" stand-in chip design license shill company.

    i find it always wonderful how the "consumer" is never the "invester" nowadays ...

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  • (Score: 2) by DannyB on Friday December 03 2021, @05:25PM (7 children)

    by DannyB (5839) Subscriber Badge on Friday December 03 2021, @05:25PM (#1201863) Journal

    You might find this page interesting. port of Debian for the RISC-V architecture called riscv64 [debian.org]

    In this project the goal is to have Debian ready to install and run on systems implementing a variant of the RISC-V ISA:

            Software-wise, this port targets the Linux kernel

            Hardware-wise, the port targets the 64-bit variant, little-endian

    This ISA variant is the "default flavour" recommended by the designers, and the one that seems to attract more interest for planned implementations that might become available in the next few years (development boards, possible consumer hardware or servers).

    While 32-bit and 128-bit implementations are possible, there are problems with this:

            In the context of RISC-V design, they have not been explored as deeply, and tools and resources (e.g. simulators, research cores) as not as well studied and adapted;

            For general purpose computers, the focus shifted to 64-bit for many years already, and there isn't a lot of interest in 32-bit architectures except for specific purposes;

            32-bit ports in Debian already struggle to compile some large packages of the archive in the last few months/years, a problem that will become worse with time;

            A 128-bit port is simply not realistic at this time.

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    • (Score: 0) by Anonymous Coward on Friday December 03 2021, @05:34PM (6 children)

      by Anonymous Coward on Friday December 03 2021, @05:34PM (#1201867)

      thank you.
      so the possible trap has been noticed ... curious if the watchtowers mand by open-source voluntaries will be enough against a well-funded (but but profits) fragmentation attack from "huge personal-data-managin-server-farms"...

      • (Score: 0) by Anonymous Coward on Friday December 03 2021, @05:51PM (5 children)

        by Anonymous Coward on Friday December 03 2021, @05:51PM (#1201875)

        ah, also "public" wireless networks (mobilenphone) are fantastic rich/goldmine. and these have a interest to have your communication device locked down. so a "open chip brain" that is master over the air-interface (radio that connects to their network) is also something they fear.
        i suppose a "mobile phone" without "public radio" but only wifi and a open cpu is okay, but as soon as mobile-phone-network chip needs to go in ... can you say "closed and locked down".
        the government on your behalf has sold our public collective right over certain frequences afterall (tho i am not sure if that includes spying and collecting personal information over those airwaves too?)

        • (Score: 4, Interesting) by DannyB on Friday December 03 2021, @06:35PM (4 children)

          by DannyB (5839) Subscriber Badge on Friday December 03 2021, @06:35PM (#1201892) Journal

          Here is how I understand the state of things. (Feel free to correct and point out any misunderstandings I have.)

          RISC-V is an ISA, not any specific hardware. Anyone can build their own chips which implement the ISA and they do not have to disclose their intellectual property about their chip implementations. Anyone can add new instructions.

          Obviously it is beneficial for software if there are common widely recognized sets of instructions that are implemented. [riscv.org] Go to this GitHub page [github.com] and click on this link (riscv-spec.pdf). On page 12 of the PDF you are in the table of contents. Notice different chapters that begin like "RV32E", "RV64I", etc. These are the names of various compatibility levels. Whether the processor is 32, 64 or 128 bit. This Wikipedia article [wikipedia.org] explains the meaning of the various instruction set extensions.

          RV32I - 32 bit, Integer add/subtract -- good for, say, a microwave oven microcontroller
          RV64I - 64 bit, Integer add/subtract
          RV128I - 128 bit, Integer add/subtract

          Additional suffixes:
          M - Integer multiplication division
          A - Atomic instruction extensions
          F - single precision floating point
          D - double precision floating point
          (. . . omitting a number of extensions here, see the Wikipedia article . . . )
          V - for vector operations
          K - for Kryptography instructions
          H - for Hypervisor instructions

          Since the extensions M, A, F and D (see list above) are so commonly necessary for most porpoises, the four extensions together MAFD can be abbreviated as G.

          So a processor that conforms to RV64G, has 64 bit word length, and Integer multiply/divide instructions, the atomic instructions, and single and double floating point instructions.

          Now extending the RV64G (which really means RV64MAFD) further, we could add C for the compact instruction format extension. This processor would be called RV64GC. The compact instruction extensions mean that some very common instructions have a more compact bit representation but do exactly the same thing. So compilers could generate the compact instructions if those compilers target any of the processors with C in their name, such as RV64GC.

          So if you go to any hardware vendor who makes chips, and they say their chip implements RV64GC, then you can count on it having all of the instructions in that specification. It could furthermore implement additional instructions, such as K for cryptography. But your compiler that targets RV64GC would still work fine on an RV64GCK chip.

          From reading on Hacker News the other day . . . there will be various "profiles", such as a "Linux profile" that is a particular set of instruction set extensions that any chip is expected to have if the chip maker expects it to run Linux. But there could be other profiles such as a supercomputer profile, or a microwave oven controller profile. The supercomputer profile might be a superset of the "linux profile".

          I hope that is helpful.

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          • (Score: 2, Interesting) by Anonymous Coward on Friday December 03 2021, @07:02PM (2 children)

            by Anonymous Coward on Friday December 03 2021, @07:02PM (#1201904)

            A Linux profile isn't the issue, it's lack of drivers and tivoization.

            Linux on ARM is an unholy mess. Google is promising to deliver a roadmap of Project Mainline at around Android 15 but for single board computers it's still hack a vendor's Linux and uboot kernel forks and hope someone at armbian has the same board. RPi is only functional because the foundation hired developers to reverse engineer a lot of proprietary Broadcom stuff such as VideoCore.

            Risc-V attempts to address some of that in a cleaner way - which is why Haiku was able to bootstrap the platform in a few months rather than the decades the ARM port has languished.

            But if the only affordable riscv board has some crappy PowerVR GPU in it, hard pass - I'll buy an off the shelf x86.

            • (Score: 3, Insightful) by DannyB on Friday December 03 2021, @07:29PM (1 child)

              by DannyB (5839) Subscriber Badge on Friday December 03 2021, @07:29PM (#1201908) Journal

              I remember once upon a time when the common wisdom was that Linux would always be an obscure niche product that could never gain major commercial traction.

              Now here we are. Linux has taken over the world. It is in everything around us. Even a Windows fanboi has more Linux machines than Windows machines.

              Microsoft has embraced open source. Recognized the need to build WSL.

              I have hope that RISC-V will upset the locked down chip industry. Why is ARM the only other company making an Intel compatible chip? Oh, yeah, because the architecture is closed and requires licensing.

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              • (Score: 2) by DannyB on Monday December 06 2021, @03:45PM

                by DannyB (5839) Subscriber Badge on Monday December 06 2021, @03:45PM (#1202514) Journal

                Sorry I meant AMD not ARM making intel compatible.

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          • (Score: 0) by Anonymous Coward on Saturday December 04 2021, @03:50PM

            by Anonymous Coward on Saturday December 04 2021, @03:50PM (#1202110)

            thank you for elaborate reply. my post was uninformed fear-mongering (or was it)?
            so i suppose it's arm allover again, just without the "license" burden ...
            it's not well light yet, but thru the mist and shadows it seems to be a chocolate bar with ridges and intentional fraction points ... *shrug*.
            but again, thanks for reply.
            the world can't even agree on a global "socket electricity" standard (or plug shape for that matter) so maybe it's just that x86 is acctually the real unicorn :)